CC2540_15 Datasheet, PDF (18/35 Pages) Texas Instruments – 2.4-GHz Bluetooth® low energy System-on-Chip

CC2540F128, CC2540F256
SWRS084F – OCTOBER 2010 – REVISED JUNE 2013
www.ti.com
BLOCK DIAGRAM
A block diagram of the CC2540 is shown in Figure 8. The modules can be roughly divided into one of three
categories: CPU-related modules; modules related to power, test, and clock distribution; and radio-related
modules. In the following subsections, a short description of each module is given.
RESET_N
XOSC_Q2
XOSC_Q1
P2_4
P2_3
P2_2
P2_1
P2_0
P1_7
P1_6
P1_5
P1_4
P1_3
P1_2
P1_1
P1_0
P0_7
P0_6
P0_5
P0_4
P0_3
P0_2
P0_1
P0_0
RESET
32-MHz
CRYSTAL OSC
32.768-kHz
CRYSTAL OSC
DEBUG
INTERFACE
WATCHDOG
TIMER
CLOCK MUX
and
CALIBRATION
HIGH-
SPEED
RC-OSC
32-kHz
RC-OSC
ON-CHIP VOLTAGE
REGULATOR
POWER-ON RESET
BROWN OUT
VDD (2 V–3.6 V)
DCOUPL
SLEEP TIMER
POWER MANAGEMENT CONTROLLER
8051 CPU
CORE
PDATA
XRAM
IRAM
SFR
DMA
UNIFIED
IRQ CTRL
ANALOG COMPARATOR
OP-AMP
MEMORY
ARBITRATOR
DS
ADC
AUDIO/DC
AES
ENCRYPTION
AND
DECRYPTION
FLASH
FLASH
FLASH CTRL
FIFOCTRL
1 KB SRAM
RADIO REGISTERS
Link Layer Engine
USB_N
USB_P
USB
DEMODULATOR
USART 0
USART 1
RECEIVE
TIMER 1 (16-Bit)
TIMER 2
(BLE LL TIMER)
TIMER 3 (8-Bit)
TIMER 4 (8-Bit)
DIGITAL
ANALOG
MIXED
Figure 8. CC2540 Block Diagram
MODULATOR
TRANSMIT
RF_P RF_N
B0301-05
18
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