SM320C6678-HIREL_15 Datasheet, PDF (177/244 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

SM320C6678-HIREL
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS910A—April 2014
Table 7-39 CIC1 Event Inputs (Secondary Interrupts for C66x CorePacs) (Part 3 of 4)
Input Event# on CIC
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
System Interrupt
TRACER_MSMC_0_INTD
TRACER_MSMC_1_INTD
TRACER_MSMC_2_INTD
TRACER_MSMC_3_INTD
TRACER_CFG_INTD
TRACER_QM_CFG_INTD
TRACER_QM_DMA_INTD
TRACER_SM_INTD
PSC_ALLINT
MSMC_SCRUB_CERROR
BOOTCFG_INTD
Reserved
MPU0_INTD (MPU0_ADDR_ERR_INT and
MPU0_PROT_ERR_INT combined)
QM_INT_PASS_TXQ_PEND_19
MPU1_INTD (MPU1_ADDR_ERR_INT and
MPU1_PROT_ERR_INT combined)
QM_INT_PASS_TXQ_PEND_20
MPU2_INTD (MPU2_ADDR_ERR_INT and
MPU2_PROT_ERR_INT combined)
QM_INT_PASS_TXQ_PEND_21
MPU3_INTD (MPU3_ADDR_ERR_INT and
MPU3_PROT_ERR_INT combined)
QM_INT_PASS_TXQ_PEND_22
MSMC_dedc_cerror
MSMC_dedc_nc_error
MSMC_scrub_nc_error
Reserved
MSMC_mpf_error8
MSMC_mpf_error9
MSMC_mpf_error10
MSMC_mpf_error11
MSMC_mpf_error12
MSMC_mpf_error13
MSMC_mpf_error14
MSMC_mpf_error15
DDR3_ERR
VUSR_INT_O
INTDST0
INTDST1
INTDST2
INTDST3
INTDST4
INTDST5
INTDST6
Description
Tracer sliding time window interrupt for MSMC SRAM bank0
Tracer sliding time window interrupt for MSMC SRAM bank1
Tracer sliding time window interrupt for MSMC SRAM bank2
Tracer sliding time window interrupt for MSMC SRAM bank3
Tracer sliding time window interrupt for CFG0 TeraNet
Tracer sliding time window interrupt for QM_SS CFG
Tracer sliding time window interrupt for QM_SS slave
Tracer sliding time window interrupt for semaphore
Power/sleep controller interrupt
Correctable (1-bit) soft error detected during scrub cycle
BOOTCFG Interrupt BOOTCFG_ERR and BOOTCFG_PROT
MPU0 addressing violation interrupt and protection violation interrupt.
Queue manager pend event
MPU1 addressing violation interrupt and protection violation interrupt.
Queue manager pend event
MPU2 addressing violation interrupt and protection violation interrupt.
Queue manager pend event
MPU3 addressing violation interrupt and protection violation interrupt.
Queue manager pend event
Correctable (1-bit) soft error detected on SRAM read
Non-correctable (2-bit) soft error detected on SRAM read
Non-correctable (2-bit) soft error detected during scrub cycle
Memory protection fault indicators for each system master PrivID
Memory protection fault indicators for each system master PrivID
Memory protection fault indicators for each system master PrivID
Memory protection fault indicators for each system master PrivID
Memory protection fault indicators for each system master PrivID
Memory protection fault indicators for each system master PrivID
Memory protection fault indicators for each system master PrivID
Memory protection fault indicators for each system master PrivID
DDR3 EMIF error interrupt
HyperLink interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
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Peripheral Information and Electrical Specifications 177