TLC5904 Datasheet, PDF (17/27 Pages) Texas Instruments – LED DRIVER

PRINCIPLES OF OPERATION
TLC5904
LED DRIVER
SLLS391 – NOVEMBER 1999
output signal check for XDOWN1, XDOWN2
XDOWN1 or XDOWN2 can be forced to low level by setting the appropriate latch value for OVM. This allows
the investigation of the correct connection of XDOWN1 or XDOWN2 to the external system.
OVM comparator setting
Setting the OVM latch is shown in Table 5. Note that the comparison voltage is set to the default value of 0.3
V when MCENA is tied to the low level.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{MONITOR CONTROL}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _DATA
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _MSB
0000
0001†
LSB
0010
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₀₁₁
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₁₀₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₁₀₁
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₁₁₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₁₁₁
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₀₀₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₀₀₁
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 1010
1011
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₁₀₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₁₀₁
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₁₁₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₁₁₁
Table 5. OVM Setting
COMPARISON
VOLTAGE
XDOWN1
NO COMPARISON
0.3 V
0.4 V
0.5 V
0.6 V
0.7 V
0.8 V
0.9 V
1.0 V
1.1 V
1.2 V
1/3 × VCCANA
1/2 × VCCANA
2/3 × VCCANA
0.3 V
0.3 V
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
DEPEND ON TSD/WDT
L
DEPEND ON TSD/WDT
XDOWN2
HI–Z
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
DEPEND ON OVM COMPARATOR
L
† _{MCENA is low.}
DOUT output timing selection
The timing for the DOUT output change can be switched by selecting the DOMODE level. When DOMODE is
low, the DOUT is changed synchronizing to the rising edge of DCLK. When DOMODE is high, the DOUT is
changed synchronizing to the falling edge of DCLK. When the shift operation with DOMODE is high, data can
be protected from a shift error even if the DCLK signal is buffered externally in serial. In this case, when ICs are
connected in cascade, the maximum data transfer speed at will be slower than the case of DOMODE low.
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