SM73302_15 Datasheet, PDF (16/31 Pages) Texas Instruments – SM73302 88 MHz, Precision, Low Noise, 1.8V CMOS Input, Decompensated Operational Amplifier

SM73302
SNOSB93A – AUGUST 2011 – REVISED APRIL 2013
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1
F
=
§
¨¨¹
©
+
R_F
R_IN
¨§^{1 + s(Rc + RIN || RF) C}
¨
©
1 + sR_cC
(4)
where 1/F's pole is located at
1
f_p = _2SRcC
(5)
1/F's zero is located at
1
f_z = _{2S Rc + RIN || RF)C}
(6)
1
F
f=0
=1+
R_F
R_IN
(7)
The circuit gain for Figure 47 at low frequencies is −R_F/R_IN, but F, the feedback factor is not equal to the circuit
gain. The feedback factor is derived from feedback theory and is the same for both inverting and non-inverting
configurations. Yes, the feedback factor at low frequencies is equal to the gain for the non-inverting configuration.
1
F
f=f
=
§
¨¨¹
©
+
R_F
R_IN
§
¨¨¹
©
+
R_IN || R_F
R_C
(8)
From this formula, we can see that
• 1/F's zero is located at a lower frequency compared with 1/F's pole.
• 1/F's value at low frequency is 1 + R_F/R_IN.
• This method creates one additional pole and one additional zero.
• This pole-zero pair will serve two purposes:
– To raise the 1/F value at higher frequencies prior to its intercept with A, the open loop gain curve, in order
to meet the G_min = 10 requirement. For the SM73302 some overcompensation will be necessary for good
stability.
– To achieve the previous purpose above with no additional loop phase delay.
Please note the constraint 1/F ≥ G_min needs to be satisfied only in the vicinity where the open loop gain A and
1/F intersect; 1/F can be shaped elsewhere as needed. The 1/F pole must occur before the intersection with the
open loop gain A.
In order to have adequate phase margin, it is desirable to follow these two rules:
Rule 1 1/F and the open loop gain A should intersect at the frequency where there is a minimum of 45° of phase
margin. When over-compensation is required the intersection point of A and 1/F is set at a frequency
where the phase margin is above 45°, therefore increasing the stability of the circuit.
Rule 2 1/F’s pole should be set at least one decade below the intersection with the open loop gain A in order to
take advantage of the full 90° of phase lead brought by 1/F’s pole which is F’s zero. This ensures that the
effect of the zero is fully neutralized when the 1/F and A plots intersect each other.
Calculating Lead-Lag Compensation for SM73302
Figure 48 is the same plot as Figure 44, but the A_VOL and phase curves have been redrawn as smooth lines to
more readily show the concepts covered, and to clearly show the key parameters used in the calculations for
lead-lag compensation.
16
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