OPA4188_15 Datasheet, PDF (16/28 Pages) Texas Instruments – 0.03-μV/°C Drift, Low-Noise, Rail-to-Rail Output,36-V, Zero-Drift OPERATIONAL AMPLIFIERS

OPA4188
SBOS641B – JUNE 2012 – REVISED MARCH 2013
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GENERAL LAYOUT GUIDELINES
For best operational device performance, good printed circuit board (PCB) layout practices are recommended.
Low-loss, 0.1-µF bypass capacitors should be connected between each supply pin and ground, placed as close
to the device as possible. A single bypass capacitor from V+ to ground is applicable to single-supply applications.
PHASE-REVERSAL PROTECTION
The OPA4188 has an internal phase-reversal protection. Many op amps exhibit a phase reversal when the input
is driven beyond its linear common-mode range. This condition is most often encountered in noninverting circuits
when the input is driven beyond the specified common-mode voltage range, causing the output to reverse into
the opposite rail. The OPA4188 input prevents phase reversal with excessive common-mode voltage. Instead,
the output limits into the appropriate rail. This performance is shown in Figure 40.
+18 V
Device
-18 V
37 VPP
Sine Wave
(±18.5 V)
V_IN
V_OUT
Time (100 ms/div)
Figure 40. No Phase Reversal
CAPACITIVE LOAD AND STABILITY
The OPA4188 dynamic characteristics have been optimized for a range of common operating conditions. The
combination of low closed-loop gain and high capacitive loads decreases the amplifier phase margin and can
lead to gain peaking or oscillations. As a result, heavier capacitive loads must be isolated from the output. The
simplest way to achieve this isolation is to add a small resistor (for example, R_OUT equal to 50 Ω) in series with
the output. Figure 41 and Figure 42 illustrate graphs of small-signal overshoot versus capacitive load for several
values of R_OUT. Also, refer to the Applications Report, Feedback Plots Define Op Amp AC Performance
(SBOA015), available for download from www.ti.com, for details of analysis techniques and application circuits.
40
R_L = 10 kW
35
R_OUT = 0 W
30
R_OUT = 25 W
25
R_OUT = 50 W
20
15
G = +1
+18 V
10
Device
ROUT
-18 V
RL
CL
5
0
0 100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
Figure 41. Small-Signal Overshoot versus
Capacitive Load (100-mV Output Step)
40
R_OUT = 0 W
35
R_OUT = 25 W
30
R_OUT = 50 W
25
20
15
10
5
R_L = 10 kW
0
0 100 200
300
400
500
G = -1 ^RI ^{= 10 kW R}F ^{= 10 kW}
+18 V
Device
-18 V
ROUT
CL
600 700 800 900 1000
Capacitive Load (pF)
Figure 42. Small-Signal Overshoot versus
Capacitive Load (100-mV Output Step)
16
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