82592 Datasheet, PDF (16/24 Pages) Texas Instruments – Precision, CMOS Input, RRIO, Wide Supply Range Amplifiers

This equation is rearranged to find the location of the two
poles:
(1)
As shown in Equation 1, as values of R₁ and R₂ are increased,
the magnitude of the poles is reduced, which in turn decreas-
es the bandwidth of the amplifier. Whenever possible, it is
best to choose smaller feedback resistors. Figure 3 shows the
effect of the feedback resistor on the bandwidth of the
LMP7701/LMP7702/LMP7704.
nates the gain peaking that can be caused by having a larger
feedback resistor. Figure 4 shows how C_F reduces gain peak-
ing.
20127354
FIGURE 3. Closed Loop Gain vs. Frequency
Equation 1 has two poles. In most cases, it is the presence of
pairs of poles that causes gain peaking. In order to eliminate
this effect, the poles should be placed in Butterworth position,
since poles in Butterworth position do not cause gain peaking.
To achieve a Butterworth pair, the quantity under the square
root in Equation 1 should be set to equal −1. Using this fact
and the relation between R₁ and R₂, R₂ = −A_V R₁, the optimum
value for R₁ can be found. This is shown in Equation 2. If R₁
is chosen to be larger than this optimum value, gain peaking
will occur.
20127355
FIGURE 4. Closed Loop Gain vs. Frequency with
Compensation
DIODES BETWEEN THE INPUTS
The LMP7701/LMP7702/LMP7704 have a set of anti-parallel
diodes between the input pins, as shown in Figure 5. These
diodes are present to protect the input stage of the amplifier.
At the same time, they limit the amount of differential input
voltage that is allowed on the input pins. A differential signal
larger than one diode voltage drop might damage the diodes.
The differential signal between the inputs needs to be limited
to ±300 mV or the input current needs to be limited to ±10 mA.
(2)
In Figure 2, C_F is added to compensate for input capacitance
and to increase stability. Additionally, C_F reduces or elimi-
FIGURE 5. Input of LMP7701
20127325
www.national.com
16