DSPIC30F5013-20E Datasheet, PDF (151/224 Pages) Texas Instruments – dsPIC30F5011/5013 Data Sheet

dsPIC30F5011/5013
Table 20-6 shows a second example of the bit
conditions for the RCON register. In this case, it is not
assumed the user has set/cleared specific bits prior to
action specified in the condition column.
TABLE 20-6: INITIALIZATION CONDITION FOR RCON REGISTER: CASE 2
Condition
Program
Counter
TRAPR IOPUWR EXTR SWR WDTO IDLE SLEEP POR BOR
Power-on Reset
Brown-out Reset
0x000000 0
0x000000 u
0
0
0
0
0
0
11
u
u
u
u
u
u
01
MCLR Reset during normal 0x000000 u
operation
Software Reset during
normal operation
0x000000 u
u
1
0
0
0
0
uu
u
0
1
0
0
0
uu
MCLR Reset during Sleep 0x000000 u
u
1
u
0
0
1
uu
MCLR Reset during Idle
0x000000 u
u
1
u
0
1
0
uu
WDT Time-out Reset
0x000000 u
u
0
0
1
0
0
uu
WDT Wake-up
PC + 2
u
u
u
u
1
u
1
uu
Interrupt Wake-up from
Sleep
PC + 2⁽¹⁾
u
u
u
u
u
u
1
uu
Clock Failure Trap
0x000004 u
u
u
u
u
u
u
uu
Trap Reset
0x000000 1
u
u
u
u
u
u
uu
Illegal Operation Reset
0x000000 u
1
u
u
u
u
u
uu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’
Note 1: When the wake-up is due to an enabled interrupt, the PC is loaded with the corresponding interrupt vector.
© 2006 Microchip Technology Inc.
DS70116F-page 149