THS6072 Datasheet, PDF (15/24 Pages) Texas Instruments – LOW-POWER ADSL DIFFERENTIAL RECEIVER

THS6072
LOW-POWER ADSL DIFFERENTIAL RECEIVER
SLOS290A – FEBRUARY 2000 – REVISED APRIL 2000
APPLICATION INFORMATION
driving a capacitive load
Driving capacitive loads with high performance amplifiers is not a problem as long as certain precautions are
taken. The first is to realize that the THS6072 has been internally compensated to maximize its bandwidth and
slew rate performance. When the amplifier is compensated in this manner, capacitive loading directly on the
output will decrease the device’s phase margin leading to high frequency ringing or oscillations. Therefore, for
capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series with the output of
the amplifier, as shown in Figure 42. A minimum value of 20 Ω should work well for most applications. For
example, in 75-Ω transmission systems, setting the series resistor value to 75 Ω both isolates any capacitance
loading and provides the proper line impedance matching at the source end.
1.3 kΩ
Input
1.3 kΩ
_
THS6072
+
20 Ω
Output
CLOAD
Figure 42. Driving a Capacitive Load
offset voltage
The output offset voltage, (V_OO) is the sum of the input offset voltage (V_IO) and both input bias currents (I_IB) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
RF
IIB–
RG
+
–
VI
+
VO
RS
ǒ ǒ ǓǓ ǒ ǒ ǓǓ ^IIB+
+ ) " ₎ ) VOO VIO 1
RF
RG
IIB RS 1
RF
RG
" IIB– RF
Figure 43. Output Offset Voltage Model
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