DAC5681_15 Datasheet, PDF (15/48 Pages) Texas Instruments – 16-BIT, 1.0 GSPS Digital-to-Analog Converter (DAC)

DAC5681
www.ti.com
SLLS864C – AUGUST 2007 – REVISED AUGUST 2012
TEST METHODOLOGY
Typical AC specifications were characterized with the DAC5681EVM using the test configuration shown in
Figure 16. A sinusoidal master clock frequency is generated by an HP8665B signal generator and into a splitter.
One output drives an Agilent 8133A pulse generator, and the other drives the CDCM7005 clock driver. The
8133A converts the sinusoidal frequency into a square wave output clock and drives an Agilent ParBERT
81250A pattern-generator clock. On the EVM, the DAC5681 CLKIN/C input clock is driven by an CDCM7005
clock distribution chip that is configured to simply buffer the external 8665B clock.
The DAC5681 output is characterized with a Rohde and Schwarz FSU spectrum analyzer. For WCDMA signal
characterization, it is important to use a spectrum analyzer with high IP3 and noise subtraction capability so that
the spectrum analyzer does not limit the ACPR measurement.
Agilent 81205A
ParBERT
Pattern
Memory
D15
P
N
D0
P
N
SYNC P
N
DCLK
P
N
DAC5681EVM SMA Adapter Board
DAC5681 DAC
100
100
100
100
DLL
DAC
3.3 V
100
3.3 V
100
3.3 V
Rohde &
Schwartz
FSU
Spectrum
Analyzer
Optional
Divider
Agilent 8133A
Pulse Generator
36 each
SMA-SMA cables
HP8665B
Synthesized
Signal
Generator
CDCM7005
Opt.
Clock
100
Divider
Figure 16. DAC5681 Test Configuration
DAC5681EVM
Copyright © 2007–2012, Texas Instruments Incorporated
Product Folder Links: DAC5681
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