BQ24300 Datasheet, PDF (15/22 Pages) Texas Instruments – OVERVOLTAGE AND OVERCURRENT PROTECTION IC AND Li+ CHARGER FRONT-END PROTECTION IC

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bq24300
bq24304
SLUS764A – AUGUST 2007 – REVISED OCTOBER 2007
APPLICATION INFORMATION
Selection of R_BAT:
It is strongly recommended that the battery not be tied directly to the VBAT pin of the device, as under some
failure modes of the IC, the voltage at the IN pin may appear on the VBAT pin. This voltage can be as high as
30V, and applying 30V to the battery in case of the failure of the device can be hazardous. Connecting the VBAT
pin through R_BAT prevents a large current from flowing into the battery in case of failure of the IC. In the interests
of safety, R_BAT should have a very high value. The problem with a large R_BAT is that the voltage drop across this
resistor because of the VBAT bias current I_VBAT causes an error in the BV_OVP threshold. This error is over and
above the tolerance on the nominal 4.35V BV_OVP threshold.
Choosing R_BAT in the range 100KΩ to 470kΩ is a good compromise. In the case of IC failure, with R_BAT equal to
100kΩ, the maximum current flowing into the battery would be (30V – 3V) ÷ 100kΩ = 246μA, which is low
enough to be absorbed by the bias currents of the system components. R_BAT equal to 100kΩ would result in a
worst-case voltage drop of R_BAT X I_VBAT ≈ 1mV. This is negligible compared to the internal tolerance of 50mV on
the BV_OVP threshold.
If the Bat-OVP function is not required, the VBAT pin should be connected to VSS.
Selection of R_CE:
The CE pin can be used to enable and disable the IC. If host control is not required, the CE pin can be tied to
ground or left un-connected, permanently enabling the device.
In applications where external control is required, the CE pin can be controlled by a host processor. As in the
case of the VBAT pin (see above), the CE pin should be connected to the host GPIO pin through as large a
resistor as possible. The limitation on the resistor value is that the minimum V_OH of the host GPIO pin less the
drop across the resistor should be greater than V_IH of the bq2430x CE pin. The drop across the resistor is given
by R_CE X I_IH.
Selection of Input and Output Bypass Capacitors:
The input capacitor C_IN in Figure 22 and Figure 23 is for decoupling, and serves an important purpose.
Whenever there is a step change downwards in the system load current, the inductance of the input cable
causes the input voltage to spike up. C_IN prevents the input voltage from overshooting to dangerous levels. It is
strongly recommended that a ceramic capacitor of at least 1μF be used at the input of the device. It should be
located in close proximity to the IN pin.
C_OUT in Figure 23 is also important: If a very fast (< 1μs rise-time) overvoltage transient occurs at the input, the
current that charges C_OUT causes the device’s current-limiting loop to kick in, reducing the gate-drive to FET Q1.
This results in improved performance for input overvoltage protection. C_OUT should also be a ceramic capacitor of
at least 1μF, located close to the OUT pin. C_OUT also serves as the input decoupling capacitor for the charging
circuit downstream of the protection IC.
PCB Layout Guidelines:
1. This device is a protection device, and is meant to protect down-stream circuitry from hazardous voltages.
Potentially, high voltages may be applied to this IC. It has to be ensured that the edge-to-edge clearances of
PCB traces satisfy the design rules for the maximum voltages expected to be seen in the system.
2. The device uses SON packages with a PowerPAD™. For good thermal performance, the PowerPAD should
be thermally coupled with the PCB ground plane. In most applications, this will require a copper pad directly
under the IC. This copper pad should be connected to the ground plane with an array of thermal vias.
3. C_IN and C_OUT should be located close to the IC. Other components like R_BAT should also be located close to
the IC.
Copyright © 2007, Texas Instruments Incorporated
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