TPS54560_15 Datasheet, PDF (14/46 Pages) Texas Instruments – TPS54560 4.5 V to 60 V Input, 5 A, Step Down DC-DC Converter with Eco-mode

TPS54560
SLVSBN0A – MARCH 2013 – REVISED MARCH 2014
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Feature Description (continued)
In applications designed to start at relatively low input voltages (that is, from 4.5 V to 9 V) and withstand high
input voltages (that is, from 40 V to 60 V), the EN terminal may experience a voltage greater than the absolute
maximum voltage of 8.4 V during the high input voltage condition. To avoid exceeding this voltage when using
the EN resistors, the EN terminal is clamped internally with a 5.8 V zener diode that will sink up to 150 μA.
VIN
TPS54560
VIN
R_UVLO1
EN
R_UVLO2
i1 ihys
V_EN
R_UVLO1
EN
10 kW
R_UVLO2
Node
5.8 V
Figure 24. Adjustable Undervoltage Lockout
(UVLO)
R_UVLO1
=
V_START - V_STOP
I_HYS
R_UVLO2
=
V_ENA
V_START - V_ENA
R_UVLO1
+ I₁
Figure 25. Low Input Voltages Applications
(3)
(4)
8.3.8 Internal Soft-Start
The TPS54560 has an internal digital soft-start that ramps the reference voltage from zero volts to its final value
in 1024 switching cycles. The internal soft-start time (10% to 90%) is calculated using Equation 5.
t_SS(ms) =
1024
f_SW (kHz)
(5)
If the EN terminal is pulled below the stop threshold of 1.2 V, switching stops and the internal soft-start resets.
The soft-start also resets in thermal shutdown.
8.3.9 Constant Switching Frequency and Timing Resistor (RT/CLK) Terminal)
The switching frequency of the TPS54560 is adjustable over a wide range from 100 kHz to 2500 kHz by placing
a resistor between the RT/CLK terminal and GND terminal. The RT/CLK terminal voltage is typically 0.5 V and
must have a resistor to ground to set the switching frequency. To determine the timing resistance for a given
switching frequency, use Equation 6 or Equation 7 or the curves in Figure 5 and Figure 6. To reduce the solution
size one would typically set the switching frequency as high as possible, but tradeoffs of the conversion
efficiency, maximum input voltage and minimum controllable on time should be considered. The minimum
controllable on time is typically 135 ns which limits the maximum operating frequency in applications with high
input to output step down ratios. The maximum switching frequency is also limited by the frequency foldback
circuit. A more detailed discussion of the maximum switching frequency is provided in the next section.
RT (kW) =
92417
f sw (kHz)^0.991
(6)
f sw
(kHz)
=
101756
RT (kW)^1.008
(7)
14
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