SN54ABT8952_07 Datasheet, PDF(14/29 Page) Texas Instruments – SCAN TEST DEVICES WITH OCTAL REGISTERED BUS TRANSCEIVERS

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SN54ABT8952_07 Datasheet, PDF (14/29 Pages) Texas Instruments – SCAN TEST DEVICES WITH OCTAL REGISTERED BUS TRANSCEIVERS

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SN54ABT8952, SN74ABT8952

SCAN TEST DEVICES WITH

OCTAL REGISTERED BUS TRANSCEIVERS

SCBS121D â AUGUST 1992 â REVISED JULY 1996

pseudo-random pattern generation (PRPG)

A pseudo-random pattern is generated in the shift-register elements of the selected BSCs on each rising edge

of TCK, updated in the shadow latches, and applied to the associated device output pins on each falling edge

of TCK. This data also is updated in the shadow latches of the selected input BSCs and applied to the inputs

of the normal on-chip logic. Figures 4 and 5 illustrate the 16-bit linear-feedback shift-register algorithms through

which the patterns are generated. An initial seed value should be scanned into the BSR before performing this

operation. A seed value of all zeroes does not produce additional patterns.

A8-I

A7-I

A6-I

A5-I

A4-I

A3-I

A2-I

A1-I

B8-O B7-O B6-O B5-O B4-O B3-O B2-O B1-O

Figure 4. 16-Bit PRPG Configuration (OEAB = 0, OEBA = 1)

B8-I

B7-I

B6-I

B5-I

B4-I

B3-I

B2-I

B1-I

A8-O A7-O A6-O A5-O A4-O A3-O A2-O A1-O

Figure 5. 16-Bit PRPG Configuration (OEAB = 1, OEBA = 0)

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