LP2951JAN_15 Datasheet, PDF (14/25 Pages) Texas Instruments – Series of Adjustable Micropower Voltage Regulators

LP2951JAN
SNVS408A – NOVEMBER 2010 – REVISED APRIL 2013
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*When V_IN ≤ 1.3V, the error flag pin becomes a high impedance, and the error flag voltage rises to its pull-up voltage.
Using V_OUT as the pull-up voltage (see Figure 35), rather than an external 5V source, will keep the error flag voltage
under 1.2V (typ.) in this condition. The user may wish to divide down the error flag voltage using equal-value resistors
(10kΩ suggested), to ensure a low-level logic signal during any fault condition, while still allowing a valid high logic
level during normal operation.
Figure 34. ERROR Output Timing
Programming The Output Voltage (LP2951)
The LP2951 may be pin-strapped for the nominal fixed output voltage using its internal voltage divider by tying
the output and sense pins together, and also tying the feedback and V_TAP pins together. Alternatively, it may be
programmed for any output voltage between its 1.235V reference and its 30V maximum rating. As seen in
Figure 35, an external pair of resistors is required.
The complete equation for the output voltage is
(1)
where V_REF is the nominal 1.235 reference voltage and I_FB is the feedback pin bias current, nominally −20nA.
The minimum recommended load current of 1μA forces an upper limit of 1.2 MΩ on the value of R₂, if the
regulator must work with no load (a condition often found in CMOS in standby). I_FB will produce a 2% typical
error in V_OUT which may be eliminated at room temperature by trimming R₁. For better accuracy, choosing R₂ =
100kΩ reduces this error to 0.17% while increasing the resistor program current to 12μA. Since the LP2951
typically draws 60μA at no load with Pin 2 open-circuited, this is a small price to pay.
*See Application Hints
**Drive with TTL-high to shut down. Ground or leave open if shutdown feature is not to be used.
Note: Pins 2 and 6 are left open.
Figure 35. Adjustable Regulator
14
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