BQ3050 Datasheet, PDF (14/28 Pages) Texas Instruments – 2-Series, 3-Series, and 4-Series Li-Ion Battery Pack Manager

bq3050
SLUSA92A – JANUARY 2011 – REVISED JUNE 2011
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ELECTRICAL CHARACTERISTICS: SBS Timing Characteristics (continued)
Typical values stated where TA = 25ºC and VCC = 14.4 V, Min/Max values stated where T_A= –40ºC to 85ºC and VCC = 3.8 V
to 25 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t_SU:STA
t_SU:STO
t_HD:DAT
t_SU:DAT
t_TIMEOUT
t_LOW
t_HIGH
t_HIGH
t_LOW:SEXT
Repeated start setup time
Stop setup time
Data hold time
Data setup time
Error signal/detect
Clock low period
Clock high period
Clock high period
Cumulative clock low slave
extend time
See ⁽¹⁾
See ⁽²⁾
See ⁽²⁾
See ⁽³⁾
4.7
µs
4.0
µs
300
ns
250
ns
25
35
ms
4.7
µs
Disabled
4.0
50
µs
25
ms
t_LOW:MEXT
t_F
t_R
Cumulative clock low master
extend time
Clock/data fall time
Clock/data rise time
See ⁽⁴⁾
See ⁽⁵⁾
See ⁽⁶⁾
10
ms
300
ns
1000
ns
(1) The bq3050 times out when any clock low exceeds t_TIMEOUT.
(2) t_HIGH, Max, is the minimum bus idle time. SMBC = 1 for t > 50 µs causes reset of any transaction involving bq3050 that is in progress.
This specification is valid when the THIGH_VAL=0. If THIGH_VAL = 1, then the value of THIGH is set by THIGH_1,2 and the timeout is
not SMBus standard.
(3) t_LOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from initial start to the stop.
(4) t_LOW:MEXT is the cumulative time a master device is allowed to extend the clock cycles in one message from initial start to the stop.
(5) Rise time tR = V_ILMAX – 0.15) to (V_IHMIN + 0.15)
(6) Fall time tF = 0.9 V_DD to (V_ILMAX – 0.15)
tSU(STOP)
SMBC
tR
T(BUF)
tF
tDH(STA)
SMBC
tF
tR
tW(H)
tW(L)
SMBD
P
S
SMBD
tHD(DATA)
tSU(DATA)
SMBC
SMBD
t(TIMEOUT)
SMBC
tSU(STA)
SMBD
S
Figure 3. SMBus Timing Diagram
14
Copyright © 2011, Texas Instruments Incorporated