TPS54380PWPG4 Datasheet, PDF (13/21 Pages) Texas Instruments – 3-V TO 6-V INPUT, 3-A OUTPUT TRACKING SYNCHRONOUS BUCK PWM SWITCHER WITH INTEGRATED FETs (SWIFT) FOR SEQUENCING

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OVERCURRENT PROTECTION
The cycle-by-cycle current limiting is achieved by sensing
the current flowing through the high-side MOSFET and
comparing this signal to a preset overcurrent threshold.
The high-side MOSFET is turned off within 200 ns of
reaching the current limit threshold. A 100-ns leading edge
blanking circuit prevents the current limit from false
tripping. Current limit detection occurs only when current
flows from VIN to PH when sourcing current to the output
filter. Load protection during current sink operation is
provided by thermal shutdown.
THERMAL SHUTDOWN
The device uses the thermal shutdown to turn off the power
MOSFETs and disable the controller if the junction
temperature exceeds 150°C. The device is released from
shutdown automatically when the junction temperature
decreases to 10°C below the thermal shutdown trip-point,
and starts up under control of the slow-start circuit.
TPS54380
SLVS454B − JANUARY 2003 − REVISED FEBRUARY 2005
Thermal shutdown provides protection when an overload
condition is sustained for several milliseconds. With a
persistent fault condition, the device cycles continuously;
starting up by control of the soft-start circuit, heating up due
to the fault condition, and then shutting down on reaching
the thermal shutdown trip-point. This sequence repeats
until the fault condition is removed.
POWERGOOD (PWRGD)
The power-good circuit monitors for under-voltage
conditions on VSENSE. If the voltage on VSENSE is 10%
below the reference voltage, the open-drain PWRGD
output is pulled low. PWRGD is also pulled low if VIN is
less than the UVLO threshold or ENA is low, or a thermal
shutdown occurs. When VIN ≥ UVLO threshold, ENA ≥
enable threshold, and VSENSE > 90% of V_ref, the
open-drain output of the PWRGD pin is high. A hysteresis
voltage equal to 3% of V_ref and a 35-µs falling edge
deglitch circuit prevent tripping of the power-good
comparator due to high-frequency noise.
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