TNETE100PMPGE Datasheet, PDF (13/26 Pages) Texas Instruments – SINGLE-CHIP 10 BASE-T WITH MII FOR 100 BASE-T/100VG-AnyLANE

ThunderLAN™ TNETE100
PCI ETHERNET™ CONTROLLER
SINGLE-CHIP 10 BASE-T WITH MII FOR 100 BASE-T/100VG-AnyLAN™
SPWS017B – APRIL 1995 – REVISED AUGUST 1996
electrical characteristics over recommended ranges of supply voltage (unless otherwise noted)
(PCI interface pins)
PARAMETER
TEST CONDITIONS ^†
3-V SIGNALING
OPERATION
MIN MAX
5-V SIGNALING
OPERATION
MIN MAX
VOH
High-level output voltage, TTL-level signal
(see Note 6)
VDD = MIN, IOH = MAX
2.4‡
2.4
VOL Low-level output voltage, TTL-level signal
IOZ High-impedance output current
II
Input current, any input or input / output
Ci
Input capacitance, any input§
Co
Output capacitance, any output or
input / output§
VDD = MAX, IOL = MAX
VDD = MAX, VO = 0 V
VDD = MAX, VO = VDD
VI = VSS to VDD
f = 1 MHz,
Others at 0 V
f = 1 MHz,
Others at 0 V
‡
0.45
10
– 10
" 10
10
10
0.5
10
– 10
" 10
10
10
† _{For conditions shown as MIN / MAX, use the appropriate value specified under the recommended operating conditions.}
‡ _{Assured by SPICE IV Curve (See PCI specification revision 2.1 section 4.2 paragraph 2 for explanation.)}
§ _{Assured by design}
NOTE 6: The following signals require an external pullup resistor: PSERR, PINTA.
UNIT
V
V
µA
µA
pF
pF
recommended operating conditions (logic pins) (see Note 4)
MIN NOM MAX
UNIT
VDD Supply voltage (5 V only)
4.75
5 5.25
V
VIH High-level input voltage
2
VDD + 0.3
V
VIL Low-level input voltage, TTL-level signal (see Note 5)
– 0.3
0.8
V
IOH High-level output current
TTL outputs
–4
mA
IOL Low-level output current (see Note 7)
TTL outputs
4
mA
NOTES:
4. The algebraic convention, where the more negative (less positive) limit is designated as a minimum, is used for logic-voltage levels
only.
5. Output current of 2 mA is sufficient to drive five low-power Schottky TTL loads or ten advanced low-power Schottky TTL loads (worst
case).
7. Logic pins include VDDL, EAD[7:0], EXLE, EALE, EOE, EDCLK, EDIO, FONLY, MTCLK, MTXEN, MTXER, MCOL, MTXD[3:0],
MRXD[3:0], MCRS, MRCLK, MRXDV, MRXER, MDCLK, MDIO, MRST.
electrical characteristics over recommended ranges of supply voltage (unless otherwise noted)
(logic pins)
PARAMETER
TEST CONDITIONS ^†
MIN MAX UNIT
VOH High-level output voltage, TTL-level signal
VDD = MIN, IOH = MAX
2.4
V
VOL Low-level output voltage, TTL-level signal
VDD = MAX, IOL = MAX
0.5 V
IOZ High-impedance output current
II
Input current
VDD = MIN, VO = VDD
VDD = MIN, VO = 0 V
VI = VSS to VDD
10
µA
– 10
"10 µA
IDD Supply current
Ci
Input capacitance, any input§
Co
Output capacitance, any output or input / output§
VDD = MAX
f = 1 MHz,
f = 1 MHz,
Others at 0 V
Others at 0 V
320 mA
10 pF
10 pF
† _{For conditions shown as MIN / MAX, use the appropriate value specified under the recommended operating conditions.}
§ _{Assured by design}
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