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TMS320F2810_08 Datasheet, PDF (13/173 Pages) Texas Instruments – Digital Signal Processors
2.2 Device Summary
Introduction
Table 2−1 provides a summary of each device’s features.
Table 2−1. Hardware Features†
FEATURE
Instruction Cycle (at 150 MHz)
Single-Access RAM (SARAM)
(16-bit word)
3.3-V On-Chip Flash (16-bit word)
On-Chip ROM (16-bit word)
Code Security for
On-Chip Flash/SARAM/OTP/ROM
Boot ROM
OTP ROM (1K X 16)
External Memory Interface
Event Managers A and B
(EVA and EVB)
S General-Purpose (GP) Timers
S Compare (CMP)/PWM
S Capture (CAP)/QEP Channels
Watchdog Timer
12-Bit ADC
S Channels
32-Bit CPU Timers
SPI
SCIA, SCIB
CAN
McBSP
Digital I/O Pins (Shared)
External Interrupts
Supply Voltage
F2810
6.67 ns
18K
64K
—
Yes
Yes
Yes
—
EVA, EVB
4
16
6/2
Yes
Yes
16
3
Yes
SCIA, SCIB
Yes
Yes
56
3
Packaging
128-pin PBK
Temperature Options
Product Status§
A: −40°C to
85°C
S: −40°C to
125°C
Q: −40°C to
125°C
Yes
Yes
Yes
TMS
F2811
6.67 ns
F2812
6.67 ns
C2810
6.67 ns
C2811
6.67 ns
C2812
6.67 ns
18K
18K
18K
18K
18K
128K
128K
—
—
—
—
—
64K
128K
128K
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes‡
Yes‡
Yes‡
—
Yes
—
—
Yes
EVA, EVB
EVA, EVB
EVA, EVB
EVA, EVB
EVA, EVB
4
4
4
4
16
16
16
16
6/2
6/2
6/2
6/2
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
16
16
16
16
3
3
3
3
Yes
Yes
Yes
Yes
SCIA, SCIB SCIA, SCIB SCIA, SCIB SCIA, SCIB
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
56
56
56
56
3
3
3
3
1.8-V Core, (135 MHz) 1.9-V Core (150 MHz), 3.3-V I/O
128-pin PBK
179-ball GHH
and ZHH
176-pin PGF
128-pin PBK
128-pin PBK
4
16
6/2
Yes
Yes
16
3
Yes
SCIA, SCIB
Yes
Yes
56
3
179-ball GHH
and ZHH
176-pin PGF
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
TMS
PGF only
TMS
Yes
TMS
Yes
TMS
PGF only
TMS
† The TMS320F2810, TMS320F2811, TMS320F2812, TMS320C2810, TMS320C2811, TMS320C2812 Digital Signal Processors Silicon Errata
(literature number SPRZ193) has been posted on the Texas Instruments (TI) website. It will be updated as needed.
‡ On C281x devices, OTP is replaced by a 1K X 16 block of ROM.
§ See Section 5.1, Device and Development Support Nomenclature for descriptions of device stages.
April 2001 − Revised July 2007
SPRS174O
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