TIBPAL22V10C Datasheet, PDF (13/17 Pages) Texas Instruments – HIGH-PERFORMANCE IMPACT E PROGRAMMABLE ARRAY LOGIC CIRCUITS

TIBPAL22V10C, TIBPAL22V10AC, TIBPAL22V10AM
HIGH-PERFORMANCE IMPACT ™ PROGRAMMABLE ARRAY LOGIC CIRCUITS
SRPS024 – D2943, OCTOBER 1986 – REVISED MARCH 1992
power-up reset
Following power up, all registers are reset to zero. The output level depends on the polarity selected during
programming. This feature provides extra flexibility to the system designer and is especially valuable in
simplifying state-machine initialization. To ensure a valid power-up reset, it is important that the rise of V_CC be
monotonic. Following power-up reset, a low-to-high clock transition must not occur until all applicable input and
feedback setup times are met.
VCC
4V
5V
Active High
Registered Output
Active Low
Registered Output
CLK
tpd ^†
(600 ns typ, 1000 ns MAX)
State Unknown
1.5 V
State Unknown
1.5 V
tsu ^‡
1.5 V
tw
VOH
VOL
VOH
VOL
VIH
1.5 V
VIL
† _{This is the power-up reset time and applies to registered outputs only. The values shown are from characterization data.}
‡ _{This is the setup time for input or feedback.}
Figure 3. Power-Up Reset Waveforms
programming information
Texas Instruments programmable logic devices can be programmed using widely available software and
inexpensive device programmers.
Complete programming specifications, algorithms, and the latest information on hardware, software, and
firmware are available upon request. Information on programmers capable of programming Texas Instruments
programmable logic is also available, upon request, from the nearest TI field sales office, local authorized TI
distributor, or by calling Texas Instruments at [phone].
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
13