SN74ALVC7803 Datasheet, PDF (13/14 Pages) Texas Instruments – 512 × 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY

SN74ALVC7803
512 × 18
CLOCKED FIRST-IN, FIRST-OUT MEMORY
SDAS274 – JANUARY 1995
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
500 Ω
500 Ω
6V
S1
Open
GND
LOAD CIRCUIT FOR OUTPUTS
Timing
Input
Data
Input
3V
1.5 V
0V
tsu
1.5 V
th
3V
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Input
(see Note B)
tPLH
Output
1.5 V
3V
1.5 V
0V
1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
tPHL
VOH
1.5 V
VOL
tw
3V
Input 1.5 V
1.5 V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
Output
3V
Control
(low-level
1.5 V
1.5 V
enabling)
0V
tPZL
tPLZ
Output
Waveform 1
S1 at 6 V
(see Note C)
Output
Waveform 2
S1 at GND
(see Note C)
tPZH
1.5 V
tPHZ
1.5 V
3V
VOL + 0.3 V
VOL
VOH
VOH – 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
v v v NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 Ω, tr 2.5 ns, tf 2.5 ns.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
3-STATE OUTPUTS (ANY Q)
PARAMETER
R1, R2
CL†
ten
tPZH
tPZL
500 Ω
50 pF
tdis
tPHZ
tPLZ
500 Ω
50 pF
tpd
tPLH / tPHL
500 Ω
† _{Includes probe and test-fixture capacitance}
50 pF
S1
GND
6V
GND
6V
Open
Figure 8. Standard CMOS Outputs (FULL, EMPTY, HF, AF/AE)
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