OPA683IDBVR Datasheet, PDF (13/31 Pages) Texas Instruments – Very Low-Power, Current Feedback RATIONAL AMPLIFIER With Disable

+5V
50Ω Source
V_I
0.1µF
12.5kΩ
2.5V
0.1µF
+
6.8µF
0.1µF
50Ω
12.5kΩ OPA683
V_O
DIS
1kΩ
R_F
1.4kΩ
R_G
1.4kΩ
0.1µF
+5V
12.5kΩ
0.1µF
+
6.8µF
2.5V
0.1µF ^{12.5kΩ OPA683}
0.1µF
V_O
50Ω Source
V_I
0.1µF
R_G
1.4kΩ
52.3Ω
DIS
1kΩ
R_F
1.4kΩ
FIGURE 3. AC-Coupled, G = +2V/V, Single-Supply, Specifi-
cation and Test Circuit.
into this midpoint voltage bias. The input voltage can swing
to within 1.25V of either supply pin, giving a 2.5V_PP input
signal range centered between the supply pins. The input
impedance of Figure 3 is set to give a 50Ω input match. If the
source does not require a 50Ω match, remove this and drive
directly into the blocking capacitor. The source will then see
the 6.25kΩ load of the biasing network. The gain resistor
(R_G) is AC-coupled, giving the circuit a DC gain of +1—which
puts the noninverting input DC bias voltage (2.5V) on the
output as well. The feedback resistor value has been ad-
justed from the bipolar supply condition to re-optimize for a
flat frequency response in +5V only, gain of +2 operation. On
a single +5V supply, the output voltage can swing to within
1.0V of either supply pin while delivering more than 50mA
output current giving 3V_PP output swing into an AC-coupled
100Ω load if required (8dBm maximum at the matched load).
The circuit of Figure 3 shows a blocking capacitor driving into
a 1kΩ load resistor. Alternatively, the blocking capacitor
could be removed if the load is tied to a supply midpoint or
to ground if the DC current required by the load is accept-
able.
Figure 4 shows the AC-coupled, single +5V supply, gain of
–1V/V circuit configuration used as a basis for the +5V only
Typical Characteristics. In this case, the midpoint DC bias on
the noninverting input is also decoupled with an additional
0.1µF decoupling capacitor. This reduces the source imped-
ance at higher frequencies for the noninverting input bias
current noise. This 2.5V bias on the noninverting input pin
appears on the inverting input pin and, since R_G is DC
blocked by the input capacitor, will also appear at the output
pin. One advantage to inverting operation is that since there
is no signal swing across the input stage, higher slew rates
and operation to even lower supply voltages is possible. To
retain a 1V_PP output capability, operation down to a 3V
supply is allowed. At a +3V supply, the input stage is
saturated, but for the inverting configuration of a current-
feedback amplifier, wideband operation is retained even
under this condition.
FIGURE 4. AC-Coupled, G = –1V/V, Single-Supply, Specifi-
cation and Test Circuit.
The circuits of Figure 3 and 4 show single-supply operation
at +5V. These same circuits may be used up to single
supplies of +12V with minimal changes in the performance of
the OPA683.
LOW POWER, VIDEO LINE DRIVER
APPLICATIONS
For low power, video line driving, the OPA683 provides the
output current and linearity to support multiple load compos-
ite video signals. Figure 5 shows a typical ±5V supply video
line driver application. The improved 2nd-harmonic distortion
of the CFB_plus architecture, along with the OPA683’s high
output current and voltage, gives exceptional differential gain
and phase performance in a very low power solution. As the
Typical Characteristics show, a single video load shows a
dG/dP of 0.06%/0.03°. Multiple loads may also be driven with
< 0.15%/0.1° dG/dP for up to 4 parallel video loads where the
amplifier is driving an equivalent load of 37.5Ω.
VIDEO_IN
75Ω
+5V
DIS
OPA683
Supply Decoupling not shown.
75Ω _{Coax 75Ω Load}
1.2kΩ
1.2kΩ
–5V
FIGURE 5. Gain of +2 Video Cable Driver.
OPA683
13
SBOS221E
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