DRV201A Datasheet, PDF (13/25 Pages) Texas Instruments – VOICE COIL MOTOR DRIVER FOR CAMERA AUTO FOCUS

DRV201A
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I²C BUS OPERATION
SLVSBN6 – JUNE 2013
The I²C bus is a communications link between a controller and a series of slave terminals. The link is established
using a two-wired bus consisting of a serial clock signal (SCL) and a serial data signal (SDA). The serial clock is
sourced from the controller in all cases where the serial data line is bi-directional for data communication
between the controller and the slave terminals. Each device has an open drain output to transmit data on the
serial data line. An external pull-up resistor must be placed on the serial data line to pull the drain output high
during data transmission.
The DRV201A hosts a slave I²C interface that supports data rates up to 400 kbit/s and auto-increment
addressing and is compliant to I²C standard 3.0.
DRV201A supports four different read and two different write operations; single read from a defined location,
single read from a current location, sequential read starting from a defined location, sequential read from current
location, single write to a defined location, sequential write starting from a defined location. All different read and
write operations are described below.
Single Write to a Defined Location
Figure 7 shows the format of a single write to a defined register. First, the master issues a start condition
followed by a seven-bit I2C address. Next, the master writes a zero to conduct a write operation. Upon receiving
an acknowledge from the slave, the master writes the eight-bit register number across the bus. Following a
second acknowledge, DRV201A sets the I²C register to a defined value and the master writes the eight-bit data
value across the bus. Upon receiving a third acknowledge, DRV201A auto increments the internal I²C register
number by one and the master issues a stop condition. This action concludes the register write.
CURRENT REGISTER NUMBER K
REGISTER NUMBER M M+1
DRV201A ADDRESS 0
0001110
REGISTER NUMBER
M
DATA
SINGLE WRITE TO A DEFINED LOCATION
Figure 7. Single Write
Single Read from a Defined Location and Current Location
Figure 8 shows the format of a single read from a defined location. First, the master issues a start condition
followed by a seven-bit I²C address. Next, the master writes a zero to conduct a write operation. Upon receiving
an acknowledge from the slave, the master writes the eight-bit register number across the bus. Following a
second acknowledge, DRV201A sets the internal I²C register number to a defined value. Then the master issues
a repeat start condition and a seven-bit I²C address followed by a one to conduct a read operation. Upon
receiving a third acknowledge, the master releases the bus to the DRV201A. The DRV201A then writes the
eight-bit data value from the register across the bus. The master acknowledges receiving this byte and issues a
stop condition. This action concludes the register read.
CURRENT REGISTER NUMBER K
REGISTER NUMBER M
M+1
DRV201A ADDRESS ₀
0001110
REGISTER NUMBER
M
DRV201A ADDRESS ₁
0001110
DATA
Figure 8. Single Read from a Defined Location
Figure 9 shows the single read from the current location. If the read command is issued without defining the
register number first, DRV201A writes out the data from the current register from the device memory.
Copyright © 2013, Texas Instruments Incorporated
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