ADS5232 Datasheet, PDF (13/29 Pages) Texas Instruments – Dual, 12-Bit, 65MSPS, +3.3V Analog-to-Digital Converter

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NAME
D1_B
D2_B
D3_B
D4_B
D5_B
D6_B
D7_B
D8_B
D9_B
D10_B
D11_B (MSB)
DV_A
DV_B
GND
IN_A
IN _A
IN_B
IN _B
INT/EXT
I_SET
MSBI/SEN
OE_A/SCLK
OE _B
OVR_A
OVR_B
REF_B
REF_T
SEL
PIN #
11
12
13
14
15
16
17
18
19
20
21
26
22
4, 7, 23, 25, 44
50
51
63
62
56
60
41
42
6
39
9
54
53
1
STPD/SDATA
VDRV
45
5, 8, 40, 43
ADS5232
SBAS294A – JUNE 2004 – REVISED MARCH 2006
PIN DESCRIPTIONS (continued)
I/O DESCRIPTION
O Data Bit 11 (D1), Channel B
O Data Bit 10 (D2), Channel B
O Data Bit 9 (D3), Channel B
O Data Bit 8 (D4), Channel B
O Data Bit 7 (D5), Channel B
O Data Bit 6 (D6), Channel B
O Data Bit 5 (D7), Channel B
O Data Bit 4 (D8), Channel B
O Data Bit 3 (D9), Channel B
O Data Bit 2 (D10), Channel B
O Data Bit 1 (D11), Channel B
O Data Valid, Channel A
O Data Valid, Channel B
Output Buffer Ground
I Analog Input, Channel A
I Complementary Analog Input, Channel A
I Analog Input, Channel B
I Complementary Analog Input, Channel B
I
Reference Select; 0 = External (Default), 1 = Internal; Force high to set for internal reference
operation.
O Bias Current Setting Resistor of 56.2kΩ to Ground
When SEL = 0, MSBI (Most Significant Bit Invert)
I 1 = Binary Two's Complement, 0 = Straight Offset Binary (Default)
When SEL = 1, SEN (Serial Write Enable)
When SEL = 0, OE_A (Output Enable Channel A)
I 0 = Enabled (Default), 1 = Tri-State
When SEL = 1, SCLK (Serial Write Clock)
I Output Enable, Channel B (0 = Enabled [Default], 1 = Tri-State)
O Over-Range Indicator, Channel A
O Over-Range Indicator, Channel B
I/O Bottom Reference/Bypass (2Ω resistor in series with a 0.1µF capacitor to ground)
I/O Top Reference/Bypass (2Ω resistor in series with a 0.1µF capacitor to ground)
Serial interface select signal. Setting SEL = 0 configures pins 41, 42, and 45 as MSBI, OE_A, and
STPD, respectively. With SEL = 0, the serial interface is disabled. Setting SEL = 1 enables the serial
I
interface and configures pins 41, 42, and 45 as SEN, SCLK, and SDATA, respectively. Serial
registers can be programmed using these three signals. When used in this mode of operation, it is
essential to provide a low-going pulse on SEL in order to reset the serial interface registers as soon
as the device is powered up. SEL therefore also has the functionality of a RESET signal.
When SEL = 0, STPD (Power Down)
I 0 = Normal Operation (Default), 1 = Enabled
When SEL = 1, SDATA (Serial Write Data)
Output Buffer Supply
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