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ADS5232 Datasheet, PDF (11/29 Pages) Texas Instruments – Dual, 12-Bit, 65MSPS, +3.3V Analog-to-Digital Converter
www.ti.com
RECOMMENDED POWER-UP SEQUENCING
Shown for the case where the serial interface is used.
AVDD
t1
t2
ADS5232
SBAS294A – JUNE 2004 – REVISED MARCH 2006
AVDD (3V to 3.6V)
VDRV (3V to 3.6V)
VDRV
t3
SEL
Device Ready
t4
t7
For ADC Operation
t5
t6
Device Ready
For Serial Register Write
SEN
Start of Clock
Device Ready
For ADC Operation
CLK
t8
NOTE: 10µs < t1 < 50ms; 10µs < t2 < 50ms; −10ms < t3 < 10ms; t4 > 10ms; t5 > 100ns; t6 > 100ns; t7 > 10ms; and t8 > 100µs.
POWER-DOWN TIMING
1µs
500µs
STPD
Device Fully
Powers Down
Device Fully
Powers Up
NOTE: The shown power−up time is based on 1µF bypass capacitors on the reference pins.
See the Theory of Operation section for details.
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