TL28L92 Datasheet, PDF (12/61 Pages) Texas Instruments – 3.3-V/5-V Dual Universal Asynchronous Receiver/Transmitter

TL28L92
3.3-V/5-V Dual Universal Asynchronous Receiver/Transmitter
SLLS890A – AUGUST 2008 – REVISED OCTOBER 2008
www.ti.com
NAME
OP7
IP0
IP1
IP2
IP3
IP4
IP5
IP6
V_CC
Table 1-1. PIN DESCRIPTION FOR 80xxx INTERFACE (continued)
TERMINAL
QFP (FR)
PIN NO.
QFN (RGZ)
PIN NO.
10
12
2
2
43
47
34
38
41
45
37
41
36
40
35
39
38, 39
42
TYPE DESCRIPTION
O Output 7: General-purpose output, or channel B open-drain, active LOW, TxB
interrupt ISR[4] output.
I Input 0: General purpose input or channel A clear to send active LOW input
(CTSAN).
I Input 1: General purpose input or channel B clear to send active LOW input
(CTSBN).
I Input 2: General-purpose input or counter/timer external clock input.
I Input 3: General purpose input or channel A transmitter external clock input (TxCA).
When the external clock is used by the transmitter, the transmitted data is clocked on
the falling edge of the clock.
I Input 4: General purpose input or channel A receiver external clock input (RxCA).
When the external clock is used by the receiver, the received data is sampled on the
rising edge of the clock.
I Input 5: General purpose input or channel B transmitter external clock input (TxCB).
When the external clock is used by the transmitter, the transmitted data is clocked on
the falling edge of the clock.
I Input 6: General purpose input or channel B receiver external clock input (RxCB).
When the external clock is used by the receiver, the received data is sampled on the
rising edge of the clock.
Pwr Power supply: 3.3 V ± 10% or 5 V ± 10 % supply input.
12
General Description
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