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LP3982IMM-1.8 Datasheet, PDF (12/23 Pages) Texas Instruments – LP3982 Micropower, Ultra Low-Dropout, Low-Noise, 300 mA CMOS Regulator
LP3982
SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013
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VB
R1
768k
4 Cells
NiMH
R3
301k
R4
180k
R2 2.22F
2.74M
+ VB
LMC7215
-
IN
OUT
LP3982
FAULT
SHDN
GND
100k
2.22F
CERAMIC
VREF
LM385A-1.2V
Figure 21. Minimum Battery Detector that Disconnects the Load Via the SHDN Pin of the LP3982
Resistor value for VUT and VLT are determined as follows:
1
GT =
+
R1
1
R2
+
1
R3
VUT = R1 (VREF) GT
VLT = R1 // R2 (VREF) GT
(8)
(The application of Figure 21 used a GT of 5μ mho)
VUT1
R1 = VREF (GT)
(9)
R2
=
1
VREF (GT)
1
-
VLT
R1
(10)
R3 =
GT -
1
1 +1
R1 R2
(11)
The above procedure assumes a rail-to-rail output comparator. Essentially, R2 is in parallel with R1 prior to
reaching the lower threshold, then R2 becomes parallel with R3 for the upper threshold. Note that the application
requires rail-to-rail input as well.
The resistor values shown in Figure 21 are the closest practical to calculated values.
Fast Start-Up
The LP3982 provides fast start-up time for better system efficiency. The start-up speed is maintained when using
the optional noise bypass capacitor. An internal 500 μA current source charges the capacitor until it reaches
about 90% of its final value.
12
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