LP3872_15 Datasheet, PDF (12/28 Pages) Texas Instruments – LP387x 1.5-A Fast Ultra-Low-Dropout Linear Regulators

LP3872, LP3875
SNVS227H – FEBRUARY 2003 – REVISED JANUARY 2015
Typical Application (continued)
8.2.1 Design Requirements
DESIGN PARAMETER
Input voltage range
Output voltage
Output current
Output capacitor
Input capacitor
Output capacitor ESR range
Table 1. Design Parameters
EXAMPLE VALUE
2.5 V to 7 V
1.8 V
1.5 A
10 µF
10 µF
100 mΩ to 4 Ω
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8.2.2 Detailed Design Procedure
8.2.2.1 Power Dissipation and Device Operation
The permissible power dissipation for any package is a measure of the capability of the device to pass heat from
the power source, the junctions of the IC, to the ultimate heat sink, the ambient environment. Thus, the power
dissipation depends on the ambient temperature and the thermal resistance across the various interfaces
between the die junction and ambient air.
The maximum allowable power dissipation for the device in a given package can be calculated using Equation 1:
P_D-MAX = ((T_J-MAX – T_A) / R_θJA)
(1)
The actual power being dissipated in the device can be represented by Equation 2:
P_D = (V_IN – V_OUT) × I_OUT
(2)
Equation 1 and Equation 2 establish the relationship between the maximum power dissipation allowed due to
thermal consideration, the voltage drop across the device, and the continuous current capability of the device.
These two equations should be used to determine the optimum operating conditions for the device in the
application.
In applications where lower power dissipation (P_D) and/or excellent package thermal resistance (R_θJA) is present,
the maximum ambient temperature (T_A-MAX) may be increased.
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum
ambient temperature (T_A-MAX) may have to be derated. T_A-MAX is dependent on the maximum operating junction
temperature (T_J-MAX-OP = 125°C), the maximum allowable power dissipation in the device package in the
application (P_D-MAX), and the junction-to ambient thermal resistance of the part/package in the application (R_θJA),
as given by Equation 3:
T_A-MAX = (T_J-MAX-OP – (R_θJA × P_D-MAX))
(3)
Alternately, if T_A-MAX can not be derated, the P_D value must be reduced. This can be accomplished by reducing
V_IN in the V_IN – V_OUT term as long as the minimum V_IN is met, or by reducing the I_OUT term, or by some
combination of the two.
8.2.2.2 External Capacitors
Like any low-dropout regulator, external capacitors are required to assure stability. These capacitors must be
correctly selected for proper performance.
• Input Capacitor: An input capacitor of at least 10 µF is required. Ceramic, tantalum, or Electrolytic capacitors
may be used, and capacitance may be increased without limit.
• Output Capacitor: An output capacitor is required for loop stability. It must be located less than 1 cm from the
device and connected directly to the output and ground pins using traces which have no other currents
flowing through them (see Layout section).
The minimum value of output capacitance that can be used for stable full-load operation is 10 µF, but it may be
increased without limit. The output capacitor must have an equivalent series resistance (ESR) value as shown in
Figure 14. Tantalum capacitors are recommended for the output capacitor.
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