LM3S9B90_11 Datasheet, PDF (1188/1295 Pages) Texas Instruments – LM3S9B90 Microcontroller

Signal Tables
Table 23-8. Signals by Signal Name (continued)
Pin Name
USB0DP
Pin Number Pin Mux / Pin
Assignment
C12
fixed
Pin Type
I/O
USB0EPEN
USB0ID
K1
PG0 (7)
O
M1
PC5 (6)
L6
PA6 (8)
A11
PB2 (8)
D10
PH3 (4)
E12
PB0
I
USB0PFLT
USB0RBIAS
USB0VBUS
VBAT
VDD
VDDA
L2
PC7 (6)
I
M2
PC6 (7)
M6
PA7 (8)
E11
PB3 (8)
B11
PE0 (9)
B10
PH4 (4)
B6
PJ1 (9)
B12
fixed
O
D12
PB1
I/O
L12
fixed
-
K7
fixed
-
G12
K8
K9
H10
G10
E10
G11
C7
fixed
-
VDDC
VREFA
D3
fixed
-
C3
A7
PB6
I
WAKE
M10
fixed
I
Buffer Type^a Description
Analog
TTL
Bidirectional differential data pin (D+ per USB
specification) for USB0.
Optionally used in Host mode to control an external
power source to supply power to the USB bus.
Analog
TTL
This signal senses the state of the USB ID signal.
The USB PHY enables an integrated pull-up, and
an external element (USB connector) indicates the
initial state of the USB controller (pulled down is
the A side of the cable and pulled up is the B side).
Optionally used in Host mode by an external power
source to indicate an error state by that power
source.
Analog
Analog
Power
Power
9.1-kΩ resistor (1% precision) used internally for
USB analog circuitry.
This signal is used during the session request
protocol. This signal allows the USB PHY to both
sense the voltage level of VBUS, and pull up VBUS
momentarily during VBUS pulsing.
Power source for the Hibernation module. It is
normally connected to the positive terminal of a
battery and serves as the battery
backup/Hibernation module power-source supply.
Positive supply for I/O and some logic.
Power
Power
Analog
TTL
The positive supply (3.3 V) for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from VDD to minimize the electrical noise
contained on VDD from affecting the analog
functions. VDDA pins must be connected to 3.3 V,
regardless of system implementation.
Positive supply for most of the logic function,
including the processor core and most peripherals.
This input provides a reference voltage used to
specify the input voltage at which the ADC converts
to a maximum value. In other words, the voltage
that is applied to VREFA is the voltage with which
an AINn signal is converted to 1023. The VREFA
input is limited to the range specified in Table
25-35 on page 1228.
An external input that brings the processor out of
Hibernate mode when asserted.
1188
Texas Instruments-Advance Information
March 19, 2011