TMS320C6413_08 Datasheet, PDF (113/145 Pages) Texas Instruments – Fixed-Point Digital Signal Processors

Synchronous DRAM Timing
DEAC
AECLKOUTx
ACEx
1
1
ABE[7:0]
AEA[22:14]
4
5
Bank
AEA[12:3]
AEA13
4
5
AED[31:0]
AAOE/ASDRAS/ASOE†
12
12
AARE/ASDCAS/ASADS/
ASRE†
11
11
AAWE/ASDWE/ASWE†
† _{AARE/ASDCAS/ASADS/ASRE, AAWE/ASDWE/ASWE, and AAOE/ASDRAS/ASOE operate as ASDCAS, ASDWE, and ASDRAS,}
respectively, during SDRAM accesses.
Figure 7−16. SDRAM DEAC Command for EMIFA
AECLKOUTx
ACEx
ABE[3:0]
AEA[22:14, 12:3]
REFR
1
1
AEA13
AED[31:0]]
AAOE/ASDRAS/ASOE†
12
12
AARE/ASDCAS/ASADS/
ASRE†
8
8
AAWE/ASDWE/ASWE†
† _{AARE/ASDCAS/ASADS/ASRE, AAWE/ASDWE/ASWE, and AAOE/ASDRAS/ASOE operate as ASDCAS, ASDWE, and ASDRAS,}
respectively, during SDRAM accesses.
Figure 7−17. SDRAM REFR Command for EMIFA
April 2004 − Revised January 2006
SPRS247F ¹¹³