TLC5930 Datasheet, PDF (11/39 Pages) Texas Instruments – 12-CHANNEL LED DRIVER

TLC5930
PRINCIPLES OF OPERATION
SLLS528 – MARCH 2002
As shown in Figure 4, in order for all the cascade-connected devices to complete one packet operation,
additional bit data to input to the first stage equivalent to two times the number of devices cascaded is required
to be clocked in. But, in practice, sending just any data is not acceptable, and some packets with bits
corresponding to two times the number of devices connected are needed for synchronization to be successful.
For example, in the case that 16 ICs are connected in cascade, since 16 x 2 = 32 bits are needed to complete
the packet operation of sixteenth IC, OVM information reading packet as a dummy, which does not write any
data to the device, is desirable. Or, an alternative method to send any packet such as use of unused ID (e.g.
FFh) is available.
Figure 5 shows the concept for normal lighting-ON operation (based on pulse-width control method). Internal
BLANK goes high on the falling edge of the 21st bit in the HSYNC packet. If the constant-current output is ON
at that time, it is turned off (except for force on mode), and the data for which the latch flag is set in the HSYNC
packet is latched during internal BLANK high-level. Internal BLANK goes low on the rising edge of the gray-scale
clock (GCLK) after the edge of LSB (32nd bit) for HSYNC packet, and the TLC5930 goes into the status that
can be turned on by the constant-current output. The constant-current output is turned on by the next rising edge
of the gray-scale clock.
During power up, the initial value of BLANK is at a high level, therefore, operation for BLANK and
constant-current output when HSYNC packet is entered for the first time as a normal operation is different from
the example shown in Figure 5.
In addition, since BLANK and the gray-scale clock are ignored in the force-ON mode, the timing to be lighted
on is also different from the example shown in Figure 5.
www.ti.com
11