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OPA348-Q1 Datasheet, PDF (11/30 Pages) Texas Instruments – OPAx348-Q1 1-MHz 45-μA CMOS Rail-to-Rail Operational Amplifier
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OPA348-Q1, OPA2348-Q1, OPA4348-Q1
SBOS465B – JANUARY 2009 – REVISED DECEMBER 2014
Feature Description (continued)
7.3.4 Input and ESD Protection
The OPAx348-Q1 family of devices incorporates internal electrostatic discharge (ESD) protection circuits on all
pins. In the case of input and output pins, this protection primarily consists of current-steering diodes connected
between the input and power-supply pins. These ESD protection diodes also provide in-circuit, input overdrive
protection, as long as the current is limited to 10 mA as stated in the Absolute Maximum Ratings table. Figure 21
shows how a series input resistor can be added to the driven input to limit the input current. The added resistor
contributes thermal noise at the amplifier input and the value should be kept to a minimum in noise-sensitive
applications.
IOVERLOAD
10-mA max
VIN
5 kW
V+
Device
VOUT
Figure 21. Input Current Protection
7.3.5 Common-Mode Rejection Ratio (CMRR)
CMRR for the OPAx348-Q1 family of devices is specified in several ways so the best match for a given
application may be used; see the Electrical Characteristics table. First, the CMRR of the device in the common-
mode range below the transition region [VCM < (V+) – 1.3 V] is given. This specification is the best indicator of
the capability of the device when the application requires use of one of the differential input pairs. Second, the
CMRR over the entire common-mode range is specified at (VCM = –0.2 V to 5.7 V). This last value includes the
variations seen through the transition region (see Figure 22).
7.3.6 Common-Mode Voltage Range
The input common-mode voltage range of the OPAx348-Q1 device extends 200 mV beyond the supply rails.
This extended range is achieved with a complementary input stage—an N-channel input differential pair in
parallel with a P-channel differential pair. The N-channel pair is active for input voltages close to the positive rail,
typically (V+) – 1.2 V to 300 mV above the positive supply, while the P-channel pair is on for inputs from 300 mV
below the negative supply to approximately (V+) – 1.4 V. A small transition region exists, typically (V+) – 1.4 V to
(V+) – 1.2 V, in which both pairs are on. This 200-mV transition region, shown in Figure 22, can vary ±300 mV
with process variation. Thus, the transition region (both stages on) can range from (V+) – 1.7 V to (V+) – 1.5 V
on the low end, up to (V+) – 1.1 V to (V+) – 0.9 V on the high end. Within the 200-mV transition region, PSRR,
CMRR, offset voltage, offset drift, and THD may be degraded compared to operation outside this region.
OFFSET VOLTAGE
vs FULL COMMON-MODE VOLTAGE RANGE
2
1.5
1
0.5
0
–0.5
–1
V–
V+
–1.5
–2
–0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
Common-Mode Voltage (V)
Figure 22. Behavior of Typical Transition Region at Room Temperature
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