English
Language : 

OPA330_1 Datasheet, PDF (11/30 Pages) Texas Instruments – 50mV VOS, 0.25mV/°C, 35mA CMOS OPERATIONAL AMPLIFIERS Zerø-Drift Series
www.ti.com
RN are operational resistors used to isolate the
ADS1100 from the noise of the digital I2C bus.
Because the ADS1100 is a 16-bit converter, a precise
reference is essential for maximum accuracy. If
absolute accuracy is not required, and the 5V power
supply is sufficiently stable, the REF3130 may be
omitted.
Figure 23 shows the OPA330 in a typical thermistor
circuit.
1MW
3V
1MW
60kW
100kW
NTC
Thermistor OPA330
Figure 23. Thermistor Measurement
GENERAL LAYOUT GUIDELINES
Attention to good layout practice is always
recommended. Keep traces short and, when
possible, use a printed circuit board (PCB) ground
plane with surface-mount components placed as
close to the device pins as possible. Place a 0.1mF
capacitor closely across the supply pins. These
guidelines should be applied throughout the analog
circuit to improve performance and provide benefits
such as reducing the electromagnetic interference
(EMI) susceptibility.
For lowest offset voltage and precision performance,
circuit layout and mechanical conditions should be
optimized. Avoid temperature gradients that create
thermoelectric (Seebeck) effects in the thermocouple
junctions formed from connecting dissimilar
conductors. These thermally-generated potentials can
be made to cancel by assuring they are equal on
both input terminals. Other layout and design
considerations include:
• Use low thermoelectric-coefficient conditions
(avoid dissimilar metals).
• Thermally isolate components from power
supplies or other heat sources.
• Shield op amp and input circuitry from air
currents, such as cooling fans.
OPA330
OPA2330
OPA4330
SBOS432D – AUGUST 2008 – REVISED JUNE 2010
Following these guidelines reduces the likelihood of
junctions being at different temperatures, which can
cause thermoelectric voltages of 0.1mV/°C or higher,
depending on materials used.
OPA330 WCSP
The OPA330 YFF package is a lead- (Pb-) free,
die-level, wafer chip-scale package (WCSP). Unlike
devices that are in plastic packages, these devices
have no molding compound, lead frame, wire bonds,
or leads. Using standard surface-mount assembly
procedures, the WCSP can be mounted to a printed
circuit board (PCB) without additional underfill.
Figure 24 and Figure 25 detail the pinout and
package marking, respectively. See the NanoStar™
and NanoFree™ 300mm Solder Bump WCSP
Application Note (SBVA017) for more detailed
information on package characteristics and PCB
design.
YFF PACKAGE
WCSP-5
(TOP VIEW)
C3 C1
OUT
IN-
B2
VS-
A3 A1
VS+
IN+
(Bump side down;
not to scale)
Figure 24. WCSP Pin Description
YFF PACKAGE
WCSP-5 Enlarged Image
(Top View)
Actual Size:
Exact Size (max):
0,862 mm x 1,156 mm
Package Marking Code:
YMD = year/month/day
TBD = indicates OPA330AIYFF
S = for engineering purposes only
(Bump side down)
Figure 25. YFF Package Marking
Copyright © 2008–2010, Texas Instruments Incorporated
Submit Documentation Feedback
11
Product Folder Link(s): OPA330 OPA2330 OPA4330