LM34910_15 Datasheet, PDF (11/18 Pages) Texas Instruments – High Voltage (40V, 1.25A) Step Down Switching Regulator

LM34910
www.ti.com
SNVS297B – OCTOBER 2004 – REVISED MARCH 2013
If the capacitor used for C2 does not have sufficient ESR, R3 is added in series as shown in Typical Application
Circuit and Block Diagram. Generally R3 is less than 1Ω. C2 should generally be no smaller than 3.3 µF,
although that is dependent on the frequency and the allowable ripple amplitude at V_OUT1. Experimentation is
usually necessary to determine the minimum value for C2, as the nature of the load may require a larger value. A
load which creates significant transients requires a larger value for C2 than a non-varying load.
D1: The important parameters are reverse recovery time and forward voltage. The reverse recovery time
determines how long the reverse current surge lasts each time the buck switch is turned on. The forward voltage
drop is significant in the event the output is short-circuited as it is mainly this diode’s voltage (plus the voltage
across the current limit sense resistor) which forces the inductor current to decrease during the off-time. For this
reason, a higher voltage is better, although that affects efficiency. A reverse recovery time of ≊30 ns, and a
forward voltage drop of ≊0.75V are preferred. The reverse leakage specification is important as that can
significantly affect efficiency. D1’s reverse voltage rating must be at least as great as the maximum V_IN, and its
current rating must equal or exceed I_PK Figure 7.
C1 and C5: C1’s purpose is to supply most of the switch current during the on-time, and limit the voltage ripple
at V_IN, on the assumption that the voltage source feeding V_IN has an output impedance greater than zero. If the
source’s dynamic impedance is high (effectively a current source), it supplies the average input current, but not
the ripple current.
At maximum load current, when the buck switch turns on, the current into V_IN suddenly increases to the lower
peak of the inductor’s ripple current, ramps up to the peak value, then drop to zero at turn-off. The average
current during the on-time is the load current. For a worst case calculation, C1 must supply this average load
current during the maximum on-time. C1 is calculated from:
I_O x t_ON
C1 =
'V
(15)
where Io is the load current, t_ON is the maximum on-time, and ΔV is the allowable ripple voltage at V_IN. C5’s
purpose is to help avoid transients and ringing due to long lead inductance at V_IN. A low ESR, 0.1 µF ceramic
chip capacitor is recommended, located close to the LM34910 .
C4: The recommended value for C4 is 0.022 µF. A high quality ceramic capacitor with low ESR is recommended
as C4 supplies a surge current to charge the buck switch gate at turn-on. A low ESR also helps ensure a
complete recharge during each off-time.
C6: The capacitor at the SS pin determines the softstart time, i.e. the time for the reference voltage at the
regulation comparator, and the output voltage, to reach their final value. The time is determined from the
following:
C6 x 2.5V
t_SS = _{11.5 PA}
(16)
PC BOARD LAYOUT
The LM34910 regulation, over-voltage, and current limit comparators are very fast, and respond to short duration
noise pulses. Layout considerations are therefore critical for optimum performance. The layout must be as neat
and compact as possible, and all of the components must be as close as possible to their associated pins. The
current loop formed by D1, L1, C2 and the S_GND and I_SEN pins should be as small as possible. The ground
connection from C2 to C1 should be as short and direct as possible.
If it is expected that the internal dissipation of the LM34910 will produce excessive junction temperatures during
normal operation, good use of the PC board’s ground plane can help considerably to dissipate heat. The
exposed pad on the bottom of the IC package can be soldered to a ground plane, and that plane should extend
out from beneath the IC, and be connected to ground plane on the board’s other side with several vias, to help
dissipate the heat. The exposed pad is internally connected to the IC substrate. Additionally the use of wide PC
board traces, where possible, can help conduct heat away from the IC. Judicious positioning of the PC board
within the end product, along with the use of any available air flow (forced or natural convection) can help reduce
the junction temperatures.
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: LM34910
Submit Documentation Feedback
11