DAC7750_15 Datasheet, PDF (11/53 Pages) Texas Instruments – DACx750 Single-Channel, 12- and 16-Bit Programmable Current Output Digital-to-Analog Converters for 4-mA to 20-mA Current Loop Applications

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DAC7750, DAC8750
SBAS538A – DECEMBER 2013 – REVISED MARCH 2014
6.8 Timing Requirements: Readback Mode⁽¹⁾
At T_A = –40°C to +125°C and DVDD = +2.7 V to +5.5 V, unless otherwise noted.
PARAMETER
MIN
t₁₁
SCLK cycle time
60
t₁₂
SCLK low time
25
t₁₃
SCLK high time
25
t₁₄
LATCH delay time
13
t₁₅
LATCH high time
40
t₁₆
Data setup time
5
t₁₇
Data hold time
7
t₁₈
LATCH low time
40
t₁₉
Serial output delay time (C_{L, SDO} = 15 pF)
t₂₀
LATCH rising edge to SDO 3-state (C_{L, SDO} = 15 pF)
(1) Specified by design, not production tested.
SCLK
LATCH
DIN
1
2
t₁₂
t₁₆
t₁₇
DB23
t₁₁
t₁₃
24
t₁₄
t₁₈
DB0
1
2
t₁₅
DB23
8
9
NOP condition
SDO
Input word specifies
register to be read
Undefined data
X
X
X
First eight bits are
don’t care bits
X DB16
Figure 2. Readback Mode Timing
MAX
35
35
22 23 24
DB0
t₁₉
DB0
Selected register
data clocked out
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t₂₀
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