AMC1304L05_15 Datasheet, PDF (11/39 Pages) Texas Instruments – AMC1304x High-Precision,Reinforced Isolated Delta-Sigma Modulators with LDO

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7.8 Regulatory Information
VDE
Certified according to DIN V VDE V 0884-10
File number: 40040142
AMC1304L05, AMC1304L25, AMC1304M05, AMC1304M25
SBAS655C – SEPTEMBER 2014 – REVISED SEPTEMBER 2015
UL, cUL
Recognized under UL1577 component recognition and CSA
component acceptance NO 5 programs
File number: E181974
7.9 IEC Safety Limiting Values
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output (I/O) circuitry. A
failure of the I/O circuitry can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient
power to overheat the die and damage the isolation barrier, potentially leading to secondary system failures.
The safety-limiting constraint is the operating virtual junction temperature range specified in the Absolute Maximum Ratings
table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware
determine the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information table is that of
a device installed in the JESD51-7, High-K Test Board for Leaded Surface-Mount Packages. The power is the recommended
maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the
junction-to-air thermal resistance.
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
I_S Safety input, output, or supply current θ_JA = 80.2°C/W, V_I = 5.5 V, T_J = 150°C, T_A = 25°C
T_C Maximum case temperature
90 mA
150 °C
7.10 IEC 61000-4-5 Ratings
PARAMETER
V_IOSM Surge immunity
TEST CONDITIONS
1.2-µs rise time and 50-μs fall time, voltage surge
VALUE
±10000
UNIT
V
7.11 Isolation Characteristics
PARAMETER
TEST CONDITIONS
V_IORM
AC voltage (bipolar or unipolar)
Maximum working insulation voltage
DC voltage
V_PD(t)
Partial discharge test voltage
t = 1 s (100% production test),
partial discharge < 5 pC
V_IOTM
Transient overvoltage
t = 60 s (qualification test)
t = 1 s (100% production test)
R_IO
Isolation resistance
V_IO = 500 V
AMC1304
1000
1500
3977
7000
8400
>10⁹
UNIT
V_RMS
V_DC
V_PEAK
V_PEAK
Ω
7.12 Package Characteristics⁽¹⁾
PARAMETER
TEST CONDITIONS
L(I01) Minimum air gap (clearance) Shortest pin to pin distance through air
L(I02)
Minimum external tracking
(creepage)
Shortest pin-to-pin distance across the package
surface
CTI
Tracking resistance
(comparative tracking index)
IEC: DIN EN 60112 (VDE 0303-11) and UL:
ASTM D3638-12
Minimum internal gap
(internal clearance)
Distance through the double insulation
(2 × 0.0135 mm)
PD Pollution degree
C_IO
Barrier capacitance input to
output
V_IN = 0.8 V_PP at 1 MHz
MIN
8
8
600
0.027
TYP
MAX UNIT
mm
mm
V
mm
2
Degrees
1.2
pF
(1) Creepage and clearance requirements must be applied according to the specific equipment isolation standards of a specific application.
Care must be taken to maintain the creepage and clearance distance of the board design to ensure that the mounting pads of the
isolator on the printed circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal according to
the measurement techniques described in the Isolation Glossary section. Techniques such as inserting grooves or ribs on the PCB are
used to help increase these specifications.
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