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ADS8361IDBQG4 Datasheet, PDF (11/29 Pages) Texas Instruments – Dual, 500kSPS, 16-Bit, 2 2 Channel, Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER
CM + VREF
+IN
+VREF
CM Voltage
–IN = CM Voltage
–VREF
CM – VREF
t
Single-Ended Inputs
CM + 1/2 VREF
CM Voltage
+IN +VREF
CM – 1/2 VREF
–IN
–VREF
t
Differential Inputs
(+IN) + (–IN)
NOTES: Common-Mode Voltage (Differential Mode) =
, Common-Mode Voltage (Single-Ended Mode) = IN–.
2
The maximum differential voltage between +IN and –IN of the ADS8361 is VREF. See Figures 3 and 4 for a further
explanation of the common voltage range for single-ended and differential inputs.
FIGURE 2. Using the ADS8361 in the Single-Ended and Differential Input Modes.
5
4.1
4
AVDD = 5V
5
4.7
4
AVDD = 5V
4.0
3
Single-Ended Input
2.7
2.3
2
3
Differential Input
2
1
0.9
0
1
1.0
0.3
0
–1
1.2
1.0
2.6
2.0
2.5
3.0
VREF (V)
FIGURE 3. Single-Ended Input: Common-Mode Voltage
Range vs VREF.
In each case, care should be taken to ensure that the output
impedance of the sources driving the +IN and –IN inputs are
matched. Otherwise, this may result in offset error, gain error,
and linearity error which will change with both temperature
and input voltage.
The input current on the analog inputs depend on a number
of factors: sample rate, input voltage, and source impedance.
Essentially, the current into the ADS8361 charges the inter-
nal capacitor array during the sampling period. After this
–1
1.0 1.2
2.6
2.0
2.5
3.0
VREF (V)
FIGURE 4. Differential Input: Common-Mode Voltage
Range vs VREF.
capacitance has been fully charged, there is no further input
current. The source of the analog input voltage must be able
to charge the input capacitance (25pF) to a 16-bit settling
level within 4 clock cycles. When the converter goes into the
hold mode, the input impedance is greater than 1GΩ.
Care must be taken regarding the absolute analog input
voltage. The +IN and –IN inputs should always remain within
the range of AGND – 0.3V to AVDD + 0.3V.
ADS8361
11
SBAS230E
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