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TLV320AIC10 Datasheet, PDF (10/57 Pages) Texas Instruments – General-Purpose 3V to 5.5V 16-bit 22-KSPS DSP CODEC
1.3 Terminal Assignments
PFB PACKAGE
(TOP VIEW)
AURXFP
AURXM
AURXCP
DTXOP
DTXOM
DTXIP
DTXIM
OUTP
OUTM
M0
M1
PWRDWN
48 47 46 45 44 43 42 41 40 39 38 37
1
36
2
35
3
34
4
33
5
32
6
31
7
30
8
29
9
28
10
27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23 24
NC
NC
AVDD2
AVSS
NC
NC
DVDD2
DVSS
NC
M/S
ALTIN
DCSI
NOTE: All NC pins should be left unconnected.
1.4 Ordering Information
TA
0°C to 70°C
–40°C to 85°C
PACKAGE
48-TQFP PFB
TLV320AIC10C
TLV320AIC10I
1.5 Terminal Functions
TERMINAL
NAME
NO.
ALTIN
26
AURXCP
3
AURXM
2
AURXFP
1
AVDD1
AVDD2
AVSS
45
34
33, 40,
42, 46
I/O
DESCRIPTION
I Serial input in the event monitor mode
I Receiver-path/GP amplifier noninverting input. It needs to be connected to AVSS if not used.
I Receiver-path amplifier A1 inverting input, or inverting input to auxiliary analog input. It needs to be connected to
AVSS if not used. Can also be used for general-purpose amplification.
I Receiver-path amplifier A1 feedback, or noninverting input to auxiliary analog input. It needs to be connected to
AVSS if not used. Can also be used for general-purpose amplification.
I Analog ADC power supply
I Analog ground
DCSI
25
I Direct configuration serial input for directly programming of internal control registers
DIN
17
I Data input. DIN receives the DAC input data and register data from the external digital signal processor (DSP),
and is synchronized to SCLK and FS. Data is latched at the falling edge of SCLK when FS is low. DIN is at high
impedance when FS is not activated.
DOUT
16
O Data output. DOUT transmits the ADC output bits and registers data, and is synchronized to SCLK and FS. Data is
sent out at the rising edge of SCLK when FS is low. DOUT is at high impedance when FS is not activated.
1–4