TAS5176 Datasheet, PDF (10/25 Pages) Texas Instruments – 6-Channel, 100-W, Digital-Amplifier Power Stage

TAS5176
SLES196 – JUNE 2007
www.ti.com
ELECTRICAL CHARACTERISTICS
F_PWM = 384 kHz, PVDD = 31V, GVDD = 12 V, VDD = 12 V, T_C (case temperature) = 25°C, unless otherwise noted. All
performance is in accordance with recommended operating conditions, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
INTERNAL VOLTAGE REGULATOR AND CURRENT CONSUMPTION
VREG
Voltage regulator, only used as reference node
VDD = 12 V
IVDD
VDD supply current
Operating, 50% duty cycle
Idle, reset mode
IGVDD_X
Gate supply current per half-bridge
50% duty cycle
Idle, reset mode
IPVDD_X
Half-bridge idle current
50% duty cycle, without output filter or load, 5.1
mode
50% duty cycle, without output filter or load, 2.1
mode
OUTPUT STAGE MOSFETs
R_DS(on), LS Sat Drain-to-source resistance, low side, satellite
R_DS(on), HS Sat Drain-to-source resistance, high side, satellite
R_DS(on), LS Sub Drain-to-source resistance, low side, subwoofer
R_DS(on), HS Sub Drain-to-source resistance, high side, subwoofer
I/O PROTECTION
T_J = 25°C, includes metallization resistance
T_J = 25°C, includes metallization resistance
T_J = 25°C, includes metallization resistance
T_J = 25°C, includes metallization resistance
V_{UVP, G}
V_{UVP, hyst} ⁽¹⁾
OTW ⁽¹⁾
Undervoltage protection limit GVDD_X
Undervoltage protection hysteresis
Overtemperature warning
OTW_hyst ⁽¹⁾
Temperature drop needed below OTW temp. for
OTW to be inactive after the OTW event
OTE ⁽¹⁾
Overtemperature error
OTE_HYST ⁽¹⁾
Temperature drop needed below OTE temp. for SD
to be released after the OTE event
OLCP
Overload protection counter
Overcurrent limit protection, sat.
I_OC
Overcurrent limit protection, sub.
Resistor programmable, high end,
Rocp = 18 kΩ
Resistor programmable, high end,
Rocp = 18 kΩ
I_OCT
Rocp
Overcurrent response time
OC programming resistor range
Resistor tolerance = 5%
STATIC DIGITAL SPECIFICATION
V_IH
High-level input voltage
V_IL
Low-level input voltage
I_lkg
Input leakage current
OTW/SHUTDOWN (SD)
PWM_X, M1, M2, M3, RESET
Static condition
R_{INT_PU}
Internal pullup resistor to DREG (3.3 V) for SD and
OTW
V_OH
High-level output voltage
Internal pullup resistor only
External pullup: 4.7-kΩ resistor to 5 V
V_OL
FANOUT
Low-level output voltage
Device fanout OTW, SD
I_O = 4 mA
No external pullup
MIN TYP MAX UNIT
3 3.3 3.6
V
7 20
mA
6 16
5 22
mA
1
3
180
mA
100
210
mΩ
210
mΩ
110
mΩ
110
mΩ
10
V
250
mV
125
°C
25
°C
155
°C
25
°C
1.25
ms
4.5
A
8
A
210
ns
27
kΩ
2
V
0.8
–80
80
μA
26
kΩ
3 3.3 3.6
4.5
5
V
0.2 0.4
30
Devices
(1) Specified by design.
10
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