MSP430X11X2_11 Datasheet, PDF (10/52 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430x11x2, MSP430x12x2
MIXED SIGNAL MICROCONTROLLER
SLAS361D − JANUARY 2002 − REVISED AUGUST 2004
special function registers
Most interrupt and module enable bits are collected into the lowest address space. Special function register bits
that are not allocated to a functional purpose are not physically present in the device. Simple software access
is provided with this arrangement.
interrupt enable 1 and 2
Address
0h
WDTIE:
OFIE:
NMIIE:
ACCVIE:
7
6
5
4
3
2
1
0
ACCVIE
NMIIE
OFIE
WDTIE
rw-0
rw-0
rw-0
rw-0
Watchdog Timer interrupt enable. Inactive if watchdog mode is selected. Active if Watchdog Timer
is configured in interval timer mode.
Oscillator fault enable
(Non)maskable interrupt enable
Flash access violation interrupt enable
Address
7
6
5
4
3
2
1
01h
UTXIE0
rw-0
URXIE0: USART0: UART and SPI receive-interrupt enable (MSP430x12x2 devices only)
UTXIE0: USART0: UART and SPI transmit-interrupt enable (MSP430x12x2 devices only)
interrupt flag register 1 and 2
0
URXIE0
rw-0
Address
02h
WDTIFG:
OFIFG:
NMIIFG:
7
6
5
4
3
2
1
0
NMIIFG
OFIFG
WDTIFG
rw-0
rw-1
rw-(0)
Set on Watchdog Timer overflow (in watchdog mode) or security key violation.
Reset on V_CC power-up or a reset condition at RST/NMI pin in reset mode.
Flag set on oscillator fault
Set via RST/NMI-pin
Address
7
6
5
4
3
2
03h
URXIFG0: USART0: UART and SPI receive flag (MSP430x12x2 devices only)
UTXIFG0: USART0: UART and SPI transmit flag (MSP430x12x2 devices only)
1
UTXIFG0
0
URXIFG0
rw-1
rw-0
10
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