LP38501TJ-ADJ Datasheet, PDF (10/18 Pages) Texas Instruments – LP38501/3-ADJ, LP38501A/3A-ADJ 3A FlexCap Low Dropout Linear Regulator

Application Information
EXTERNAL CAPACITORS
The LP3850X requires that at least 10 µF (±20%) capacitors
be used at the input and output pins located within one cm of
the IC. Larger capacitors may be used without limit on size for
both C_IN and C_OUT. Capacitor tolerances such as temperature
variation and voltage loading effects must be considered
when selecting capacitors to ensure that they will provide the
minimum required amount of capacitance under all operating
conditions for the application.
In general, ceramic capacitors are best for noise bypassing
and transient response because of their ultra low ESR. It must
be noted that if ceramics are used, only the types with X5R
or X7R dielectric ratings should be used (never Z5U or Y5F).
Capacitors which have the Z5U or Y5F characteristics will see
a drop in capacitance of as much as 50% if their temperature
increases from 25°C to 85°C. In addition, the capacitance
drops significantly with applied voltage: a typical Z5U or Y5F
capacitor can lose as much as 60% of it’s rated capacitance
if only half of the rated voltage is applied to it. For these rea-
sons, only X5R and X7R ceramics should be used.
INPUT CAPACITOR
All linear regulators can be affected by the source impedance
of the voltage which is connected to the input. If the source
impedance is too high, the reactive component of the source
may affect the control loop’s phase margin. To ensure prop-
er loop operation, the ESR of the capacitor used for C_IN
must not exceed 0.5 Ohms. Any good quality ceramic ca-
pacitor will meet this requirement, as well as many good
quality tantalums. Aluminum electrolytic capacitors may also
work, but can possibly have an ESR which increases signifi-
cantly at cold temperatures. If the ESR of the input capacitor
may exceed 0.5 Ohms, it is recommended that a 2.2 µF ce-
ramic capacitor be used in parallel, as this will assure stable
loop operation.
OUTPUT CAPACITOR
Any type of capacitor may be used for C_OUT, with no limita-
tions on minimum or maximum ESR, as long as the minimum
amount of capacitance is present. The amount of capacitance
can be increased without limit. Increasing the size of C_OUT
typically will give improved load transient response.
SETTING THE OUTPUT VOLTAGE
The output voltage of the LP38501/3-ADJ can be set to any
value between 0.6V and 5V using two external resistors
shown as R1 and R2 in Figure 1.
V_OUT = V_ADJ (1 + R1/R2) + I_ADJ (R1)
Where V_ADJ is the adjust pin voltage and I_ADJ is the bias cur-
rent flowing into the adjust pin.
STABILITY AND PHASE MARGIN
Any regulator which operates using a feedback loop must be
compensated in such a way as to ensure adequate phase
margin, which is defined as the difference between the phase
shift and -180 degrees at the frequency where the loop gain
crosses unity (0 dB). For most LDO regulators, the ESR of the
output capacitor is required to create a zero to add enough
phase lead to ensure stable operation. The LP38501 has a
unique internal compensation circuit which maintains phase
margin regardless of the ESR of the output capacitor, so any
type of capacitor may be used.
Figure 2 shows the gain/phase plot of the LP38501-ADJ with
an output of 1.2V, 10 µF ceramic output capacitor, delivering
2A of load current. It can be seen that the unity-gain crossover
occurs at 300 kHz, and the phase margin is about 40° (which
is very stable).
30028153
FIGURE 2. Gain-Bandwidth Plot for 2A Load
Figure 3 shows the gain and phase with no external load. In
this case, the only load is provided by the gain setting resistors
(about 12 kΩ total in this test). It is immediately obvious that
the unity-gain frequency is significantly lower (dropping to
about 500 Hz), at which point the phase margin is 125°.
FIGURE 1.
30028157
The value of R2 should always be less than or equal to 10
kΩ for good loop compensation. R1 can be selected for a giv-
en V_OUT using the following formula:
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