TUSB6020 Datasheet, PDF (1/12 Pages) Texas Instruments – USB 2.0 HIGH-SPEED ON-THE-GO DUAL-ROLE CONTROLLER

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TUSB6020
USB 2.0 HIGH-SPEED ON-THE-GO DUAL-ROLE CONTROLLER
SCPS170C – JANUARY 2007 – REVISED JULY 2007
FEATURES
• USB On-the-Go (OTG) Controller Core
– Use Mentor Graphics USB 2.0 OTG Core
– Dual-Role Controller Can Operate Either as
a Function Controller for a USB Peripheral
or as the Host/Peripheral in Point-to-Point
or Multi-Point Communications With Other
USB Functions
– Compliant With the USB 2.0 Standard for
High-Speed (480-Mbps) Functions and
With the OTG Supplement to the USB 2.0
Specification
– Supports OTG Communications With One
or More High-, Full-, or Low-Speed Devices
– Supports Session Request Protocol (SRP)
and Host Negotiation Protocol (HNP)
– Supports Suspend-and-Resume Signaling
– Configurable for up to 15 Transmit
Endpoints and up to 15 Receive Endpoints
– Configurable FIFOs, Including the Option
of Dynamic FIFO Sizing
– 16k-Byte RAM for USB Endpoint FIFO
Shared by USB In/Out Endpoints
– Support for External Direct Memory
Access (DMA) to FIFOs
– Soft Connect/Disconnect Option
– Performs All Transaction Scheduling in
Hardware
• Integrated USB 2.0 OTG PHY
– Fully Compliant With USB 2.0 Standard
and USB 2.0 Transceiver Macrocell
Interface (UTMI) Revision 1.05
– Optimized One-Port Operation at Low
Speed (1.5 Mbps), Full Speed (12 Mbps),
and High Speed (480 Mbps)
– Support for External Charge Pump
– Supports UTMI+3 Level 3 (Host and OTG
Devices, High/Full/Low Speed and
Preamble Packet)
– Protection Circuitry to Withstand Possible
VBUS Short
– Use 19.200-MHz, 24.000-MHz, or
48.000-MHz Reference Clock Input as a
Crystal or External Clock Driver
– At-Speed Built-In Self Test (BIST) With
Internal Asynchronous Capability Through
Loopback
– On-Chip Integrated Accurate 45-Ω
High-Speed Termination, 1.5-kΩ Pullup,
and 15-kΩ Pulldown Resistors
– On-Chip Phase-Locked Loop (PLL) to
Reduce Noise on the High-Speed Clocks
– Active Power Consumption Less Than
100 mW
• VLYNQ 2.0 Interface to External Host
Controller
– High-Speed (150-MHz) Point-to-Point Serial
Interface for Direct Connection to Other
VLYNQ Interface
– Supports 4X RX and 4X TX Lines
– Memory-Mapped Master/Slave
– Hardware Flow Control Internal Loopback
Mode
– Multichannel DMA Controller
– Integrated List Processor Capable of
Parsing Communications Port
Programming Interface (CPPI)
3.0-Compliant Buffer Descriptors
• System Control Module
– Controls Clock and Reset Generation and
Distribution
– Controls and Observes Device Power
States
– Controls Test and Debug Modes
– Supports External Power Management
• V_BUS Switched Central Resource
– Supports Two VBUSP Master and Three
VBUSP Slave Interfaces
• High-Performance 80-Pin
MicroStar BGA™/MicroStar Junior™
ZQE Package
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Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
MicroStar BGA, MicroStar Junior, MicroStar BGA are trademarks of Texas Instruments.
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PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
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Copyright © 2007, Texas Instruments Incorporated