TMS45160 Datasheet, PDF (1/23 Pages) Texas Instruments – 262144-WORD BY 16-BIT HIGH-SPEED DYNAMIC RANDOM-ACCESS MEMORIES

TMS45160, TMS45160P
262144-WORD BY 16-BIT HIGH-SPEED
DYNAMIC RANDOM-ACCESS MEMORIES
SMHS160D – AUGUST 1992 – REVISED JUNE 1995
This data sheet is applicable to all TMS45160/Ps
symbolized with Revision “D” and subsequent
revisions as described on page 21.
D Organization . . . 262144 × 16
D 5-V Supply (±10% Tolerance)
D Performance Ranges:
ACCESS ACCESS ACCESS READ OR
TIME TIME TIME WRITE
tRAC
MAX
tCAC
MAX
tAA CYCLE
MAX
MIN
’45160/P-60
60 ns 15 ns 30 ns 110 ns
’45160/P-70
70 ns 20 ns 35 ns 130 ns
’45160/P-80
80 ns 20 ns 40 ns 150 ns
D Enhanced-Page-Mode Operation With
xCAS-Before-RAS (xCBR) Refresh
D Long Refresh Period
512-Cycle Refresh in 8 ms (Max)
64 ms Max for Low Power With
Self-Refresh Version ( TMS45160P)
D 3-State Unlatched Output
D Low Power Dissipation
D Texas Instruments EPIC™ CMOS Process
D All Inputs, Outputs, and Clocks Are TTL
Compatible
D High-Reliability, 40-Lead, 400-Mil-Wide
Plastic Surface-Mount (SOJ) Package and
40/44-Lead Thin Small-Outline Package
( TSOP)
D Operating Free-Air Temperature Range
0°C to 70°C
D Low Power With Self-Refresh Version
D Upper and Lower Byte Control During Read
and Write Operations
description
DZ PACKAGE
( TOP VIEW )
V_CC 1
DQ0 2
DQ1 3
DQ2 4
DQ3 5
V_CC 6
DQ4 7
DQ5 8
DQ6 9
DQ7 10
NC 11
NC 12
W 13
RAS 14
NC 15
A0 16
A1 17
A2 18
A3 19
V_CC 20
40 V_SS
39 DQ15
38 DQ14
37 DQ13
36 DQ12
35 V_SS
34 DQ11
33 DQ10
32 DQ9
31 DQ8
30 NC
29 LCAS
28 UCAS
27 OE
26 A8
25 A7
24 A6
23 A5
22 A4
21 V_SS
DGE PACKAGE
( TOP VIEW )
V_CC 1
DQ0 2
DQ1 3
DQ2 4
DQ3 5
V_CC 6
DQ4 7
DQ5 8
DQ6 9
DQ7 10
44 V_SS
43 DQ15
42 DQ14
41 DQ13
40 DQ12
39 V_SS
38 DQ11
37 DQ10
36 DQ9
35 DQ8
NC 13
NC 14
W 15
RAS 16
NC 17
A0 18
A1 19
A2 20
A3 21
V_CC 22
32 NC
31 LCAS
30 UCAS
29 OE
28 A8
27 A7
26 A6
25 A5
24 A4
23 V_SS
PIN NOMENCLATURE
A0 – A8
DQ0 – DQ15
LCAS
NC
OE
RAS
UCAS
VCC
VSS
W
Address Inputs
Data In / Data Out
Lower Column-Address Strobe
No Internal Connection
Output Enable
Row-Address Strobe
Upper Column-Address Strobe
5-V Supply
Ground
Write Enable
The TMS45160 series are high-speed, 4 194 304-bit dynamic random-access memories organized as 262 144
words of 16 bits each. The TMS45160P series are high-speed, low-power, self-refresh 4 194 304-bit dynamic
random-access memories organized as 262 144 words of 16 bits each. They employ state-of-the-art EPIC™
( Enhanced Performance Implanted CMOS) technology for high performance, reliability, and low power at low
cost.
These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. Maximum power dissipation
is as low as 770 mW operating and 11 mW standby on 80-ns devices. All inputs and outputs, including clocks,
are compatible with Series 74 TTL. All addresses and data-in lines are latched on chip to simplify system design.
Data out is unlatched to allow greater system flexibility.
The TMS45160 and TMS45160P are each offered in a 40-lead plastic surface-mount SOJ package ( DZ suffix)
and a 40/44-lead plastic surface-mount small-outline ( TSOP) package ( DGE suffix). These packages are
characterized for operation from 0°C to 70°C.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1995, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
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