SN75HVD10DRG4 Datasheet, PDF (1/28 Pages) Texas Instruments – Optional Driver Output Transition Times for Signaling Rates (1) of 1 Mbps, 10 Mbps, and 32 mbps

SN65HVD10, SN65HVD10Q, SN75HVD10
SN65HVD11, SN65HVD11Q, SN75HVD11
SN65HVD12, SN75HVD12
www.ti.com
SLLS505K – FEBRUARY 2002 – REVISED SEPTEMBER 2011
3.3-V RS-485 TRANSCEIVERS
Check for Samples: SN65HVD10, SN65HVD10Q, SN75HVD10, SN65HVD11, SN65HVD11Q, SN75HVD11, SN65HVD12, SN75HVD12
FEATURES
1
• Operates With a 3.3-V Supply
• Bus-Pin ESD Protection Exceeds 16 kV HBM
• 1/8 Unit-Load Option Available (Up to 256
Nodes on the Bus)
• Optional Driver Output Transition Times for
Signaling Rates ⁽¹⁾ of 1 Mbps, 10 Mbps, and
32 Mbps
• Meets or Exceeds the Requirements of ANSI
TIA/EIA-485-A
• Bus-Pin Short Circuit Protection From –7 V to
12 V
• Low-Current Standby Mode . . . 1 µA Typical
• Open-Circuit, Idle-Bus, and Shorted-Bus
Failsafe Receiver
• Thermal Shutdown Protection
• Glitch-Free Power-Up and Power-Down
Protection for Hot-Plugging Applications
• SN75176 Footprint
APPLICATIONS
• Digital Motor Control
• Utility Meters
• Chassis-to-Chassis Interconnects
• Electronic Security Stations
• Industrial Process Control
• Building Automation
• Point-of-Sale (POS) Terminals and Networks
DESCRIPTION
The SN65HVD10, SN75HVD10, SN65HVD11,
SN75HVD11, SN65HVD12, and SN75HVD12
combine a 3-state differential line driver and
differential input line receiver that operate with a
single 3.3-V power supply. They are designed for
balanced transmission lines and meet or exceed
ANSI standard TIA/EIA-485-A and ISO 8482:1993.
These differential bus transceivers are monolithic
integrated circuits designed for bidirectional data
communication on multipoint bus-transmission lines.
The drivers and receivers have active-high and
active-low enables respectively, that can be externally
connected together to function as direction control.
Very low device standby supply current can be
achieved by disabling the driver and the receiver.
The driver differential outputs and receiver differential
inputs connect internally to form a differential input/
output (I/O) bus port that is designed to offer
minimum loading to the bus whenever the driver is
disabled or V_CC = 0. These parts feature wide positive
and negative common-mode voltage ranges, making
them suitable for party-line applications.
D OR P PACKAGE
(TOP VIEW)
R
1
RE
2
DE
3
D
4
8
V_CC
7B
6A
5 GND
1
R
2
RE
(1) The signaling rate of a line is the number of voltage
transitions that are made per second expressed in the units
bps (bits per second).
3
DE
4
D
6
A
7B
1
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Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2011, Texas Instruments Incorporated