SN74F377A Datasheet, PDF (1/5 Pages) Texas Instruments – OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE

• Contains Eight D-Type Flip-Flops
With Single-Rail Outputs
• Clock Enable Latched to Avoid False
Clocking
• Applications Include:
Buffer/Storage Registers
Shift Registers
Pattern Generators
• Buffered Common Enable Input
• Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
SN74F377A
OCTAL D-TYPE FLIP-FLOP
WITH CLOCK ENABLE
SDFS018D – D2932, MARCH 1987 – REVISED OCTOBER 1993
DW OR N PACKAGE
(TOP VIEW)
CE 1
1Q 2
1D 3
2D 4
2Q 5
3Q 6
3D 7
4D 8
4Q 9
GND 10
20 V_CC
19 8Q
18 8D
17 7D
16 7Q
15 6Q
14 6D
13 5D
12 5Q
11 CLK
description
The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The
SN74F377A features a latched clock enable (CE) input.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse if CE is low. Clock triggering occurs at a particular voltage level and is
not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input
signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the CE
input.
The SN74F377A is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
CE CLK D
H
X
X
L
↑
H
L
↑
L
X
L
X
OUTPUT
Q
Q0
H
L
Q0
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1993, Texas Instruments Incorporated
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