SN74F126 Datasheet, PDF (1/5 Pages) Texas Instruments – QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

• 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
• Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
description
The SN74F126 bus buffer features independent
line drivers with 3-state outputs. Each output is
disabled when the associated output enable (OE)
input is low.
The SN74F126 is characterized for operation from
0°C to 70°C.
SN74F126
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SDFS017A – D3212, JANUARY 1989 – REVISED OCTOBER 1993
D OR N PACKAGE
(TOP VIEW)
1OE 1
1A 2
1Y 3
2OE 4
2A 5
2Y 6
GND 7
14 V_CC
13 4OE
12 4A
11 4Y
10 3OE
9 3A
8 3Y
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
H
H
H
H
L
L
L
X
Z
logic symbol^†
1
1OE
2
1A
4
2OE
5
2A
10
3OE
9
3A
13
4OE
12
4A
EN ¹
3
1Y
6
2Y
8
3Y
11
4Y
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984 and}
IEC Publication 617-12.
logic diagram (positive logic)
1
1OE
2
1A
4
2OE
5
2A
10
3OE
9
3A
3
1Y
6
2Y
8
3Y
13
4OE
12
4A
11
4Y
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1993, Texas Instruments Incorporated
2–1