SN74ALVC7804_07 Datasheet, PDF (1/13 Pages) Texas Instruments – 512 × 18 FIRST-IN, FIRST-OUT MEMORY

SN74ALVC7804
512 × 18
FIRST-IN, FIRST-OUT MEMORY
SCAS432 – JANUARY 1995
• Operates at 3-V to 3.6-V V_CC
• Load Clock and Unload Clock Can Be
DL PACKAGE
(TOP VIEW)
Asynchronous or Coincident
• Low-Power Advanced CMOS Technology
• Full, Empty, and Half-Full Flags
• Programmable Almost-Full/Almost-Empty
RESET 1
D17 2
D16 3
D15 4
56 OE
55 Q17
54 Q16
53 Q15
Flag
D14 5
52 GND
• Fast Access Times of 18 ns With a 50-pF
Load and All Data Outputs Switching
Simultaneously
• Data Rates From 0 to 40 MHz
• 3-State Outputs
• Pin Compatible With SN74ACT7804
• Packaged in Shrink Small-Outline 300-mil
D13 6
D12 7
D11 8
D10 9
V_CC 10
D9 11
D8 12
GND 13
51 Q14
50 V_CC
49 Q13
48 Q12
47 Q11
46 Q10
45 Q9
44 GND
Package (DL) Using 25-mil Center-to-Center
D7 14 43 Q8
Spacing
D6 15 42 Q7
description
D5 16
D4 17
41 Q6
40 Q5
A FIFO memory is a storage device that allows
data to be written into and read from its array at
independent data rates. The SN74ALVC7804 is
an 18-bit FIFO with high speed and fast access
times. Data is processed at rates up to 40 MHz
with access times of 18 ns in a bit-parallel format.
The SN74ALVC7804 is designed for 3-V to 3.6-V
V_CC operation.
Data is written into memory on a low-to-high
transition of the load clock (LDCK) and is read out
on a low-to-high transition of the unload clock
D3 18
D2 19
D1 20
D0 21
HF 22
PEN 23
AF/AE 24
LDCK 25
NC 26
NC 27
FULL 28
39 V_CC
38 Q4
37 Q3
36 Q2
35 GND
34 Q1
33 Q0
32 UNCK
31 NC
30 NC
29 EMPTY
(UNCK). The memory is full when the number of
words clocked in exceeds the number of words clocked out by 512. When the memory is full, LDCK has no effect
on the data residing in memory. When the memory is empty, UNCK has no effect.
Status of the FIFO memory is monitored by the full (FULL), empty (EMPTY), half-full (HF), and almost-
full/almost-empty (AF/AE) flags. The FULL output is low when the memory is full and high when the memory
is not full. The EMPTY output is low when the memory is empty and high when it is not empty. The HF output
is high whenever the FIFO contains 256 or more words and is low when it contains 255 or less words. The AF/AE
status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset are used to
program the almost-empty offset value (X) and the almost-full offset value (Y), if program enable (PEN) is low.
The AF/AE flag is high when the FIFO contains X or less words or (512 minus Y) or more words. The AF/AE
flag is low when the FIFO contains between (X plus 1) and (511 minus Y) words.
A low level on the reset (RESET) resets the internal stack pointers and sets FULL high, AF/AE high, HF low,
and EMPTY low. The Q outputs are not reset to any specific logic level. The FIFO must be reset upon power
up. The first word loaded into empty memory causes EMPTY to go high and the data to appear on the Q outputs.
The data outputs are in the high-impedance state when the output-enable (OE) is high.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1995, Texas Instruments Incorporated
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