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SN54AC574 Datasheet, PDF (1/16 Pages) Texas Instruments – OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC574, SN74AC574
OCTAL DĆTYPE EDGEĆTRIGGERED FLIPĆFLOPS
WITH 3ĆSTATE OUTPUTS
SCAS541E − OCTOBER 1995 − REVISED OCTOBER 2003
D 2-V to 6-V VCC Operation
D Inputs Accept Voltages to 6 V
D Max tpd of 8.5 ns at 5 V
D 3-State Outputs Drive Bus Lines Directly
description/ordering information
These 8-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. The devices
are particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight flip-flops of the ′AC574 devices are
D-type edge-triggered flip-flops. On the positive
transition of the clock (CLK) input, the Q outputs
are set to the logic levels set up at the data (D)
inputs.
SN54AC574 . . . J OR W PACKAGE
SN74AC574 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
OE 1
1D 2
2D 3
3D 4
4D 5
5D 6
6D 7
7D 8
8D 9
GND 10
20 VCC
19 1Q
18 2Q
17 3Q
16 4Q
15 5Q
14 6Q
13 7Q
12 8Q
11 CLK
SN54AC574 . . . FK PACKAGE
(TOP VIEW)
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal
logic state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
the increased drive provide the capability to drive
bus lines in a bus-organized system without need
for interface or pullup components.
3D
3 2 1 20 19
4
18
2Q
4D 5
17 3Q
5D 6
16 4Q
6D 7
15 5Q
7D 8
14 6Q
9 10 11 12 13
OE does not affect internal operations of the
flip-flop. Old data can be retained or new data can
be entered while the outputs are in the
high-impedance state.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N
Tube
SN74AC574N
SN74AC574N
SOIC − DW
Tube
Tape and reel
SN74AC574DW
SN74AC574DWR
AC574
−40°C to 85°C SOP − NS
Tape and reel SN74AC574NSR
AC574
SSOP − DB
Tape and reel SN74AC574DBR
AC574
TSSOP − PW
Tube
Tape and reel
SN74AC574PW
SN74AC574PWR
AC574
CDIP − J
Tube
SNJ54AC574J
SNJ54AC574J
−55°C to 125°C CFP − W
Tube
SNJ54AC574W
SNJ54AC574W
LCCC − FK
Tube
SNJ54AC574FK
SNJ54AC574FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2003, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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