SM34020APCM40 Datasheet, PDF (1/89 Pages) Texas Instruments – GRAPHICS SYSTEM PROCESSOR

SM34020APCM40
GRAPHICS SYSTEM PROCESSOR
D Class B High-Reliability Processing
D 1-µm CMOS Technology
D Commercial Operating Temperature Range
0°C to 70°C
D SM34020APCM40
100-ns Instruction Cycle Time
D Fully Programmable 32-Bit
General-Purpose Processor With
512-Megabyte Linear Address Range
(Bit Addressable)
D Second-Generation Graphics System
Processor (GSP)
− Object-Code Compatible With the
SM34010
− Enhanced Instruction Set
− Optimized Graphics Instructions
− Coprocessor Interface
D Pixel Processing, XY Addressing, and
Window Checking Built Into the Instruction
Set
D Programmable 1-, 2-, 4-, 8-, 16-, or 32-Bit
Pixel Size With 16 Boolean and Six
Arithmetic Pixel Processing Options
(Raster Ops)
D 512-Byte LRU On-Chip Instruction Cache
(I-Cache)
D Optimized DRAM / Video RAM (VRAM)
Interface
− Page Mode for Burst-Memory Operations
− Dynamic Bus Sizing (16-Bit and
32-Bit Transfers)
− Byte-Oriented CAS Strobes
D Flexible Host Processor Interface
− Supports Host Transfers
− Direct Access to All of the
SM34020APCM40 Address Space
− Implicit Addressing
− Prefetch for Enhanced Read Access
SGLS361 − JULY 2006
D Programmable CRT Control
− Composite Synchronization Mode
− Separate Synchronization Mode
− Synchronization to External
Synchronization
D Direct Support for Special Features of
1M VRAMs
− Load Write Mask
− Load Color Mask
− Block Write
− Write Using the Write Mask
D Flexible Multiprocessor Interface
D 144-Pin PCM Quad Flat Package (QFP)
108
109
PCM PACKAGE
( TOP VIEW )
73
72
144
1
37
36
description
The SM34020APCM40 graphics system processor (GSP) is the second generation of an advanced
high-performance CMOS 32-bit microprocessor optimized for graphics display systems. With a built-in
instruction cache (I-cache), the ability to simultaneously access memory and registers, and an instruction set
designed to expedite raster graphics operations, the SM34020APCM40 provides user-programmable control
of the CRT interface, as well as the memory interface [both standard DRAM and multiport video RAM (VRAM)].
The 4-gigabit (512-megabyte) physical address space is addressable on bit boundaries using variable width
data fields (1 to 32 bits). Additional graphics addressing modes support 1-, 2-, 4-, 8-, 16-, and 32-bit-wide pixels.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright  2006, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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