F28M36P63B2 Datasheet, PDF (1/202 Pages) Texas Instruments – Concerto Microcontrollers

F28M36P63B2, F28M36P63C2
F28M36P53B2, F28M36P53C2, F28M36P33B2, F28M36P33C2
www.ti.com
Concerto Microcontrollers
SPRS825 – OCTOBER 2012
1 F28M36x (Concerto™) MCUs
1.1 Features
12
• Master Subsystem — ARM® Cortex™-M3
– 125 MHz
– Cortex™-M3 Core Hardware Logic Built-in
Self Test
– Embedded Memory
• Up to 1MB Flash (ECC)
• Up to 128KB RAM (ECC or Parity)
• Up to 64KB Shared RAM
• 2KB IPC Message RAM
– 5 Universal Asynchronous
Receiver/Transmitters (UARTs)
– 4 Synchronous Serial Interfaces (SSIs)/
Serial Peripheral Interface (SPI)
– 2 Inter-integrated Circuits (I2Cs)
– Universal Serial Bus On-the-Go (USB-OTG) +
PHY
– 10/100 ENET 1588 MII
– 2 Controller Area Networks (CANs)
– 32-Channel Direct Memory Access (µDMA)
– Dual Security Zones (128-Bit Password per
Zone)
– External Peripheral Interface (EPI)
– Micro Cyclic Redundancy Check (µCRC)
Module
– 4 General-Purpose Timers
– 2 Watchdog Timer Modules
– Endianness: Little Endian
• Clocking
– On-chip Crystal Oscillator/External Clock
Input
– Dynamic PLL Ratio Changes Supported
• 1.2-V Digital, 1.8-V Analog, 3.3-V I/O Design
• Interprocessor Communications (IPC)
– 32 Handshaking Channels
– 4 Channels Generate IPC Interrupts
– Can be Used to Coordinate Transfer of Data
Through IPC Message RAMs
• Up to 142 Individually Programmable,
Multiplexed GPIO Pins
– Glitch-free I/Os
• Control Subsystem — TMS320C28x™ 32-Bit
CPU
– 150 MHz
– C28x Core Hardware Logic Built-in Self Test
– Embedded Memory
• Up to 512KB Flash (ECC)
• Up to 36KB RAM (ECC or Parity)
• Up to 64KB Shared RAM
• 2KB IPC Message RAM
– IEEE-754 Single-Precision Floating-Point
Unit (FPU)
– Viterbi, Complex Math, CRC Unit (VCU)
– Serial Communications Interface (SCI)
– Serial Peripheral Interface (SPI)
– Inter-Integrated Circuit (I2C)
– 6-Channel Direct Memory Access (DMA)
– 12 Enhanced Pulse Width Modulator (ePWM)
Modules
• 24 Outputs (16 High-Resolution)
– 6 32-Bit Enhanced Capture (eCAP) Modules
– 3 32-Bit Enhanced Quadrature Encoder
(eQEP) Modules
– Multichannel Buffered Serial Port (McBSP)
– External Peripheral Interface (EPI)
– One Security Zone (128-Bit Password)
– 3 32-Bit Timers
– Endianness: Little Endian
• Analog Subsystem
– Dual 12-Bit Analog-to-Digital Converters
(ADCs)
– Up to 2.88 MSPS
– Up to 24 Channels
– 4 Sample-and-Hold (S/H) Circuits
– Up to 6 Comparators With 10-Bit Digital-to-
Analog Converter (DAC)
• Package
– 289-Ball ZWT Plastic Ball Grid Array (PBGA)
1
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2
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