DS90C187 Datasheet, PDF (1/21 Pages) Texas Instruments – Low Power 1.8V Dual Pixel FPD-Link (LVDS) Serializer

DS90C187
April 25, 2012
Low Power 1.8V Dual Pixel FPD-Link (LVDS) Serializer
General Description
The DS90C187 is a Low Power Serializer for portable battery
powered application that reduces the size of the RGB inter-
face between the host GPU and the Display.
The DS90C187 Serializer is designed to support dual pixel
data transmission between Host and Flat Panel Display up to
QXGA 2048x1536@60Hz resolutions. The transmitter con-
verts up to 48 bits (Dual Pixel 24 bit color) of 1.8V LVCMOS
data into two channels of 4 data + clock (4D+C) reduced width
interface LVDS compatible data streams.
DS90C187 supports 3 modes of operation. In single pixel
mode in/out mode, the device can drive up to SXGA+
1400x1050@60Hz. In this mode, the device converts one
bank of 24 bit RGB data to one channel of 4D+C LVDS data
stream. In single pixel in / dual pixel out mode, the device can
drive up to WUXGA+ 1920x1440@60Hz. In this configura-
tion, the device provides single-to-dual pixel conversion and
converts one bank of 24 bit RGB data into two channels of 4D
+C LVDS streams at half the pixel clock rate. In dual pixel in /
dual pixel out mode, the device can drive up to QXGA
2048x1536@60Hz or up to QSXGA 2560x2048@30Hz. In
this mode, the device converts 2 channels of 24 bit RGB data
into 2 channels of 4D+C LVDS streams. For all the modes,
the device supports 18bpp and 24bpp color.
The DS90C187 is offered in a small 92 pin dual row QFN
package and features single 1.8V supply for minimal power
dissipation.
Features
■ ^{100 mW typical power consumption at 185 MHz (SIDO}
mode)
■ ^{Drives QXGA/WQXGA class displays}
■ ^{Three operating modes:}
— Single Pixel In / Single Pixel Out (SISO), 105 MHz max
— Single Pixel In / Dual Pixel Out (SIDO), 185 MHz
— Dual Pixel In / Dual Pixel Out (DIDO), 105 MHz
■ ^{Supports 24 bit RGB, 48 bit RGB}
■ ^{Optional low power mode supports 18 bit RGB, 36 bit RGB}
■ ^{Supports 3D+C, 4D+C, 6D+C, 6D+2C, 8D+C, and 8D+2C}
LVDS configurations
■ ^{Compatible with FPD-Link, and FlatLink Deserializers}
■ ^{1.8V VDDIO & Core Supply}
■ ^{Interfaces directly with 1.8V LVCMOS}
■ ^{Less than 1mW power consumption in Sleep Mode}
■ ^{Spread Spectrum Clock Compatible}
■ ^{Small 7mm x 7mm x 0.9 mm 92–pin dual row QFN}
package
Applications
■ ^{Media Tablet Devices}
■ ^{eBook / Notebooks / Laptops}
■ ^{Portable Display Monitors}
Typical Application Diagram
Single Pixel In Dual Pixel Out (SIDO) Mode
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