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DS10BR150 Datasheet, PDF (1/15 Pages) Texas Instruments – DC - 1.0 Gbps Low Jitter, High Noise Immunity, Low Power Operation
DS10BR150
www.ti.com
SNLS252D – APRIL 2007 – REVISED APRIL 2013
DS10BR150 1.0 Gbps LVDS Buffer / Repeater
Check for Samples: DS10BR150
FEATURES
1
•2 DC - 1.0 Gbps Low Jitter, High Noise
Immunity, Low Power Operation
• On-chip 100Ω Input and Output Termination
Minimizes Insertion and Return Losses,
Reduces Component Count and Minimizes
Board Space
• 7 kV ESD on LVDS I/O Pins Protects Adjoining
Components
• Small 3 mm x 3 mm 8-WSON Space Saving
Package
APPLICATIONS
• Clock and Data Buffering
• OC-12 / STM-4
• FireWire 800
DESCRIPTION
The DS10BR150 is a single channel 1.0 Gbps LVDS
buffer optimized for high-speed signal transmission
over lossy FR-4 printed circuit board backplanes and
balanced cables. Fully differential signal paths ensure
exceptional signal integrity and noise immunity.
Wide input common mode range allows the receiver
to accept signals with LVDS, CML and LVPECL
levels; the output levels are LVDS. A very small
package footprint requires a minimal space on the
board while the flow-through pinout allows easy board
layout. The differential inputs and outputs are
internally terminated with a 100Ω resistor to lower
device input and output return losses, reduce
component count and further minimize board space.
Typical Application
ASIC / FPGA
CML
LVDS
LVPECL
BR150 LVDS ASIC / FPGA
1
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2013, Texas Instruments Incorporated